Adaptive Cycle-Slipped Detector for PLL Unlock Detection

Solution Overview

Problem

Conventional cycle-slip detectors in Phase-Locked Loop (PLL) circuits face issues with transient false-lock detection and require manual phase offset adjustment, especially at high frequencies and when fractional division with dithering is used, limiting their effectiveness in accommodating varying reference frequencies.

Innovation Solution

An adaptive cycle-slipped detector (ACSD) is introduced, featuring a phase comparator, phase shifter, and cycle-slip counter, which automatically adjusts the phase offset and requires a specified number of locked cycles to assert the lock position, ensuring symmetrical unlock detection and reducing transient false-lock indications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a simple cycle-slip detector is used, then the device complexity is reduced, but transient false-lock detection occurs

Engineering Contradiction:

Improvecycle-slip detector complexityVSAvoidlock detection accuracy

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by requiring a predetermined number of locked cycles to be counted before asserting the lock position. This advance preparation prevents transient false-lock detection by ensuring that the PLL has maintained lock conditions for a sufficient duration before declaring a locked state, thereby improving reliability without significantly increasing device complexity.

Inventive Principle:

Principle #10Preliminary action

2Ease of operation

If manual phase offset adjustment is used, then the ease of operation is reduced, but the measurement precision is improved

Engineering Contradiction:

Improvephase offset adjustmentVSAvoidphase alignment accuracy

Core Design Contradiction:

Ease of operationVSMeasurement precision

Solution Approach 1:

The patent implements self-service through an adaptive phase shifter that automatically adjusts the phase offset between the reference signal and feedback signal. The system self-calibrates by monitoring the lock detection output and dynamically adjusting the phase shift to maintain optimal alignment, eliminating the need for manual adjustment while preserving measurement precision through continuous automatic optimization.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent uses feedback by connecting the cycle-slip detector output back to control the phase shifter. The detected lock/unlock status is fed back to adjust the phase offset in real-time, creating a closed-loop system that automatically maintains accurate phase alignment without manual intervention, thereby improving both ease of operation and measurement precision.

Inventive Principle:

Principle #23Feedback

3Productivity

If the lock counter requires a specified number of locked cycles, then the productivity is reduced, but the reliability is improved

Engineering Contradiction:

Improvelock detection speedVSAvoidfalse-lock reduction

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by requiring a predetermined number of locked cycles to be counted before asserting the lock position. This advance preparation prevents transient false-lock detection by ensuring that the PLL has maintained lock conditions for a sufficient duration before declaring a locked state, thereby improving reliability without significantly increasing device complexity.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS7323940B2Adaptive cycle-slipped detector for unlock detection in phase-locked loop applications

Publication Date: 2008.01.29 KEYSIGHT TECHNOLOGIES INC

AI summary

An adaptive cycle-slipped detector (“ACSD”) for use in a Phase-Locked Loop (“PLL”) circuit. The ACSD may include a phase comparator, a phase shifter in signal communication with the phase comparator, and a cycle-slipped detector (“CSD”) in signal communication with the phase shifter.