Adaptive Digital Delay Line Control in DC-DC Converters
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional DC-DC converters face a tradeoff between precision and power consumption, particularly when operating over a wide range of system clock frequencies, leading to increased power consumption and limited precision when input voltage varies widely.
Innovation Solution
A DC-DC converter with adaptive control of the digital delay line (DDL) that adjusts the delay elements based on system clock frequency, allowing for a wide range of system clock values by enabling or disabling delay elements and adjusting the voltage control, thereby optimizing power consumption and precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the DC-DC converter operates over a wide range of system clock frequencies, then the operating range is enlarged, but power consumption increases
Solution Approach 1:
The patent implements dynamic adjustment of the digital delay line configuration based on the detected system clock frequency. The controller selectively enables or disables delay elements in the DDL according to the operating frequency range, allowing the converter to adapt its internal timing characteristics to match varying clock frequencies while maintaining optimal power consumption and output precision
Solution Approach 2:
The patent changes the effective delay parameters of the digital delay line by selectively activating different delay elements based on the system clock frequency. This parameter adjustment allows the converter to maintain precise pulse width modulation across wide frequency ranges without continuously operating all delay elements at full power
2Adaptability or versatility
If the DC-DC converter operates over a wide range of system clock frequencies, then the operating range is enlarged, but output precision deteriorates
Solution Approach 1:
The controller dynamically reconfigures the digital delay line based on the detected system clock frequency, enabling the converter to maintain precise timing control across varying frequency ranges. This dynamic adaptation ensures that output precision is preserved regardless of the operating frequency
Solution Approach 2:
The digital delay line is segmented into multiple selectable delay elements that can be individually enabled or disabled. This segmentation allows the converter to optimize the delay path for different frequency ranges, maintaining measurement and output precision across the entire operating spectrum
3Adaptability or versatility
If the DC-DC converter operates with varying input voltage, then adaptability is improved, but power consumption increases
Solution Approach 1:
The converter dynamically adjusts the digital delay line configuration in response to varying input voltage conditions. By adapting the delay elements to match the current operating voltage and frequency range, the system maintains efficient power consumption while handling wide voltage variations
Data Source
AI summary
A direct current (DC) to DC (DC-DC) converter includes a comparator setting a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL adjusting the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer selectively outputting a delayed version of the signal pulse; a phase detector operatively coupled to a system clock and the multiplexer, the phase detector generating a phase error between an output of the multiplexer and the system clock; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit adjusting the delay introduced to the signal pulse in accordance with the phase error.