Adaptive Desaturation Fault Detection for Power Transistor Turn-On
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Solution Overview
Problem
Existing fault detection methods for power transistors often result in false positives during the turn-on process due to desaturation-based sensing, leading to potential catastrophic failures from short circuits, as they cannot differentiate between normal operation and fault conditions quickly enough.
Innovation Solution
A desaturation-based fault-detection circuit with an adaptable blanking time and a disconnect switch that uses gate voltage sensing to determine the blanking duration, allowing for faster fault detection by disabling sensing during the transition from off to on states until the gate voltage crosses a predetermined threshold, thereby reducing false positives and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If desaturation-based sensing is used during power transistor turn-on, then fault detection capability is provided, but false positives occur due to normal voltage transitions
Solution Approach 1:
The patent applies preliminary action by implementing a blanking mechanism that proactively disables the desaturation sensing circuit before the turn-on transient occurs. The blanking signal is generated based on gate voltage detection, which precedes the collector-emitter voltage transition, allowing the system to prepare for and avoid false fault detection during the known problematic turn-on period
Solution Approach 2:
The patent introduces an intermediary gate voltage sensing mechanism that mediates between the control signal and the desaturation sensing circuit. By detecting gate voltage transitions, this intermediary signal triggers the blanking mechanism, which in turn controls the enabling/disabling of the desaturation comparator, thus preventing false positives without compromising fault detection capability
2Reliability
If blanking time is extended to avoid false positives, then false detection is reduced, but fault detection response time increases
Solution Approach 1:
The patent applies dynamics by making the blanking duration adaptive rather than fixed. The blanking mechanism automatically adjusts its duration based on the actual turn-on characteristics of the power transistor, extending blanking only as long as necessary to cover the turn-on transient period. This dynamic adjustment ensures false positive prevention while minimizing fault detection delay
Solution Approach 2:
The patent implements feedback through gate voltage sensing that continuously monitors the power transistor's switching state. This feedback signal controls the blanking mechanism's duration, allowing the system to adapt the blanking time to actual device behavior rather than using a conservative fixed duration, thus optimizing both false positive reduction and response time
3Ease of manufacture
If fixed blanking duration is used, then implementation is simple, but it cannot adapt to different slew rates and fault conditions
Solution Approach 1:
The patent applies preliminary action by using gate voltage sensing to predict and prepare for turn-on events before they affect the desaturation sensing circuit. This preliminary detection allows the blanking mechanism to activate at the optimal moment, adapting to different slew rates without requiring complex post-processing or adjustment mechanisms
Solution Approach 2:
The patent implements parameter changes by allowing the blanking duration to vary dynamically based on gate voltage transition characteristics. Different slew rates result in different gate voltage rise times, which automatically produce appropriate blanking durations, thus adapting the system to various operating conditions while maintaining relatively simple circuit implementation
Data Source
AI summary
An apparatus and methods to operate the same to provide fast fault-detection on power semiconductor devices such as power transistors are disclosed. In some embodiment, a desaturation based fault-detection circuit for a power transistor is provided. The fault-detection circuit has an adaptable blanking time and a disconnect switch in the blanking mechanism that allow for quick enabling of fault-detection mechanisms to achieve fast fault detection times on power semiconductor devices.


