Adaptive Die Enumeration Logic for 3D Stacked ICs
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Solution Overview
Problem
Current die enumeration methods in three-dimensional stacked integrated circuits are not adaptive enough to handle different product configurations and design architectures, leading to difficulties in assigning unique addresses to dies, which can result in address aliasing and increased complexity in testing and debugging.
Innovation Solution
Incorporating die enumeration logic that generates unique die address space identifiers (IDs) for each die, which can detect its position in the stack and adjust IDs based on the number of dies above it, ensuring no address aliasing occurs, even in complex multi-tower configurations, using techniques like shifting and backfilling with logic values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If current die enumeration methods are used in 3D stacked integrated circuits, then manufacturing and design defects can be tested, but address aliasing occurs and the system cannot adapt to different product configurations
Solution Approach 1:
The die enumeration logic dynamically determines unique die addresses based on the actual stack configuration detected during operation. Each die counts the number of dies above it and uses this dynamic information to generate its unique address, allowing the system to adapt to different product configurations while maintaining address uniqueness.
Solution Approach 2:
Each die enumeration logic independently determines its own unique address by counting the number of dies stacked above it and using this information to generate its address. The system serves itself by having each die autonomously calculate its position and address without requiring external configuration or hardwired straps.
2Device complexity
If traditional die enumeration methods are used, then testing can be performed, but the hardware requirements increase and complexity increases for multi-tower configurations
Solution Approach 1:
The die enumeration logic is segmented into modular components: a counter that counts dies above, a comparator that compares the count to a reference value, and logic that generates the unique address. This segmentation allows each component to be simple and standardized, reducing overall complexity while maintaining manufacturing flexibility for different configurations.
Solution Approach 2:
The system changes parameters dynamically during operation rather than requiring different hardware configurations. By varying the count value based on stack position and using this parameter to generate addresses, the system achieves manufacturing flexibility without increasing hardware complexity.
3Productivity
If unique addresses are assigned to each die, then testing and debugging efficiency improves, but address aliasing occurs in complex configurations
Solution Approach 1:
The die enumeration logic uses feedback from the stack configuration to generate unique addresses. Each die receives feedback about the number of dies above it, and this feedback is used to adjust its address generation, ensuring uniqueness while maintaining high testing and debugging efficiency.
Data Source
AI summary
A system and method for efficiently addressing dies in a three-dimensional stacked integrated circuit. Multiple stacked dies may be included in a single package or module. At least two of the dies are vertically stacked. One or more of the dies may include die enumeration logic that generates a unique die address space identifier (ID) for a particular die. Unless a die is a base die, each die receives a unique die ID for itself from a die placed below itself. The die then generates a unique die ID for one or more dies placed above itself and sends these die IDs to the dies located on top of itself. If a die is a base die, then the logic may receive a root value for a first unique die ID within the vertical stack from the package substrate or silicon based interposer beneath it.