Adaptive DLL Filtering Circuit for Jitter Tracking

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Solution Overview

Problem

Conventional semiconductor integrated circuits with delay locked loops (DLLs) face challenges in determining jitter effectively, as the fixed sampling number in filtering units can lead to decreased situation handling ability and increased tracking time, making it difficult to adapt to varying environmental conditions.

Innovation Solution

A filtering circuit with a jitter determination reference control unit that adjusts the sampling number based on operation modes, allowing for optimized jitter determination in each mode, thereby improving tracking efficiency and reducing the risk of malfunctions due to voltage fluctuations or other environmental changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed sampling number is used in the filtering unit, then the circuit structure remains simple, but the situation handling ability decreases and tracking time increases

Engineering Contradiction:

Improvesituation handling abilityVSAvoidfiltering unit structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic sampling number configuration where the filtering unit can adjust its sampling number based on different operation modes (e.g., DLL mode, non-DLL mode). This allows the system to adapt to varying environmental conditions and operational requirements, improving situation handling ability while maintaining reasonable circuit complexity through mode-based control.

Inventive Principle:

Principle #15Dynamics

2Loss of time

If a fixed sampling number is used in the filtering unit, then the circuit design is straightforward, but the tracking time increases

Engineering Contradiction:

Improvetracking timeVSAvoidfiltering control mechanism

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The patent changes the sampling number parameter dynamically based on operation modes to optimize tracking performance. In DLL mode, a first sampling number is used for efficient tracking, while in non-DLL mode, a second sampling number is applied. This parameter adjustment reduces tracking time without requiring a completely redesign of the filtering unit structure.

Inventive Principle:

Principle #35Parameter changes

3Measurement precision

If the sampling number is increased to improve jitter determination accuracy, then the filtering precision improves, but the tracking time increases

Engineering Contradiction:

Improvejitter determination accuracyVSAvoidtracking time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies dynamic sampling number adjustment to balance jitter determination accuracy and tracking time. By selecting appropriate sampling numbers based on operation modes, the system achieves sufficient filtering precision for jitter determination while maintaining efficient tracking performance, avoiding the trade-off present in fixed sampling number designs.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8633748B2Filtering circuit and semiconductor integrated circuit having the same

Publication Date: 2014.01.21 SK HYNIX INC

AI summary

A filtering circuit includes jitter determination reference control unit configured to determine a jitter determination reference in correspondence to an operation mode and output a control signal in response to the jitter determination reference, and a filtering unit configured to set the jitter determination reference in response to the control signal and determine whether an input signal is maintained during a sample period in response to the set jitter determination reference.