Configurable Adaptive Double Device Data Correction Memory Buffer

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Solution Overview

Problem

Existing memory systems face challenges in providing efficient data protection and fault tolerance, particularly in mission-critical applications, where systems failures can have severe consequences. Conventional approaches like lock-step mode increase hardware complexity and power consumption.

Innovation Solution

The implementation of a configurable in-line adaptive double device data correction (ADDDC) system, which uses additional error correction code (ECC) check symbols stored as metadata to provide enhanced data protection and fault tolerance without the overhead of lock-step mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lock-step mode is used to provide data protection and fault tolerance, then reliability is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvedata protection and fault toleranceVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements adaptive error correction that dynamically adjusts its operation based on detected errors. The system transitions from normal operation to adaptive double device correction mode only when errors are detected, providing lock-step-like protection only when needed. This dynamic approach maintains reliability while reducing average complexity and power consumption compared to continuous lock-step mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the memory system by introducing configurable thresholds and adaptive correction levels. The system can be configured to correct single-bit errors using standard ECC and escalate to adaptive double device correction only when multiple errors are detected, thereby adjusting the protection level based on actual error conditions rather than maintaining maximum protection continuously.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If lock-step mode is used to provide data protection and fault tolerance, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata protection and fault toleranceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The adaptive error correction system dynamically adjusts power consumption based on error conditions. During normal operation, the system uses minimal power for standard ECC correction. Only when errors are detected does the system activate the power-intensive adaptive double device correction mechanism, thereby reducing average power consumption while maintaining reliability when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs periodic error detection and only activates the full adaptive correction sequence when errors are found. This periodic activation of power-intensive correction operations, rather than continuous operation, significantly reduces average power consumption while maintaining the same reliability guarantees when errors occur.

Inventive Principle:
Principle #19Periodic action

3Reliability

If additional ECC check symbols are stored as metadata to provide enhanced data protection, then reliability is improved, but bandwidth overhead increases

Engineering Contradiction:
Improvedata protectionVSAvoidbandwidth overhead
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by storing additional ECC check symbols only as metadata associated with specific cache lines that have experienced errors, rather than continuously adding protection to all data transmissions. This localized approach to error correction provides enhanced data protection only where and when needed, minimizing bandwidth overhead for the majority of error-free operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary error detection using standard ECC before activating the full adaptive correction sequence. By detecting errors in advance and only then storing additional ECC check symbols as metadata, the system avoids unnecessary bandwidth consumption while ensuring protection is in place when errors occur.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250130892A1Memory device with configurable adaptive double device data correction
Publication Date: 2025.04.24 RAMBUS INC
  • US20250130892A1 patent drawing
  • US20250130892A1 patent drawing
  • US20250130892A1 patent drawing

AI summary

Technologies for configurable adaptive double device data correction (ADDDC) are described. A memory buffer device includes error detection and correction (EDC) logic to autonomously detect errors in a region of memory and, upon detection of an error, calculate additional ECC check symbols for cache lines in the region and store the additional ECC check symbols as metadata associated with the cache lines.