Adaptive Duty Cycle Correction for High-Speed Clock Signals

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Solution Overview

Problem

High-speed clock signals often experience distortion, leading to unstable or abnormal operations in systems and circuits, necessitating a reliable duty cycle correction to ensure stable system operation.

Innovation Solution

A duty cycle correction circuit and method that employs a combination of linear approximation and binary weighted approximation methods, with adaptive loop tuning and duty checks, to accurately adjust the duty cycle of high-speed clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single duty cycle correction method is used, then the correction process is simple, but the correction speed and precision cannot be optimized simultaneously

Engineering Contradiction:
Improveduty cycle correction precisionVSAvoidcorrection method complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the duty cycle correction process into multiple segments: a first loop using a first correction method and a second loop using a second correction method. Each loop uses a different correction approach, allowing the system to achieve both high precision and reasonable complexity by segmenting the correction task into manageable parts with different characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic switching between different correction methods based on real-time duty cycle conditions. The controller dynamically selects which correction method to apply in each loop, adapting the correction approach to the current state of the clock signal. This dynamic adaptation enables the system to optimize both precision and complexity by using the most appropriate method for each correction stage.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If multiple correction loops are implemented, then correction precision is improved, but the correction time increases

Engineering Contradiction:
Improveduty cycle correction precisionVSAvoidcorrection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent employs periodic correction loops that systematically adjust the duty cycle in stages. The first loop performs initial correction with larger adjustments, and the second loop refines the correction with smaller adjustments. This periodic, staged approach ensures that precision is improved through multiple loops while minimizing total correction time by using larger step sizes initially and only refining when necessary.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If adaptive method switching is used, then correction precision is optimized, but control complexity increases

Engineering Contradiction:
Improveduty cycle correction precisionVSAvoidcontroller complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements feedback mechanisms where the controller monitors the duty cycle status and automatically switches between correction methods based on measured performance. The controller uses feedback from the duty cycle measurements to determine when to switch from the first correction method to the second method, optimizing precision while keeping control complexity manageable through rule-based decision making.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The correction system is designed to be self-regulating, automatically selecting and switching between correction methods without external intervention. The controller autonomously monitors the duty cycle and switches methods based on pre-defined conditions, making the system self-sufficient and reducing the need for complex external control logic.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12587182B2Duty cycle correction circuit and duty cycle correcting method
Publication Date: 2026.03.24 YANGTZE MEMORY TECH CO LTD
  • US12587182B2 patent drawing
  • US12587182B2 patent drawing
  • US12587182B2 patent drawing

AI summary

A duty cycle correction circuit can comprise at least one low pass filter configured to convert a clock signal to a voltage, and a voltage comparator configured to compare the voltage with a reference voltage to output a comparison signal. The duty cycle correction circuit can further comprise a controller configured to select, based on the comparing voltage, a duty cycle correction method from a first method and a second method different from the first method. The duty cycle correction circuit can further comprise a duty regulator configured to perform a duty tuning operation to adjust a duty of the clock signal using the selected duty cycle correction method.