Adaptive DVFS Control Loop Sampling Frequency Adjustment

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Solution Overview

Problem

Conventional dynamic voltage and frequency scaling (DVFS) controllers struggle to maintain power efficiency and real-time responsiveness when processors switch between multiple applications or workloads with different characteristics, as they are designed for specific workloads and fail to perform adequately when faced with varying input workloads.

Innovation Solution

Adaptive adjustment of the sampling frequency and gain of the DVFS control loop to ensure control precision and match processor performance with changing workloads, allowing for dynamic adjustments in clock rate and voltage to reduce errors and maintain desired performance levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional DVFS controllers are designed for specific workloads, then power efficiency is improved for those workloads, but adaptability to multiple different workloads deteriorates

Engineering Contradiction:
Improvepower efficiencyVSAvoidadaptability to multiple workloads
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic adjustment of control loop parameters (sampling frequency and gain) based on detected workload characteristics. The controller transitions from static, workload-specific design to dynamic adaptation, automatically adjusting its behavior to match current workload demands, thereby achieving both power efficiency and multi-workload adaptability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes key control parameters (sampling frequency and gain) based on detected workload characteristics. By monitoring workload patterns and adjusting these parameters dynamically, the system optimizes power efficiency for different workload types without requiring separate controllers for each workload scenario

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If DVFS control loop parameters are fixed, then control precision is maintained for designed workloads, but performance deteriorates when workloads change beyond design parameters

Engineering Contradiction:
Improvecontrol precisionVSAvoidperformance under varying workloads
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The controller performs self-adjustment by detecting its own performance errors and automatically modifying its control parameters (sampling frequency and gain) to correct deviations. This self-service mechanism maintains control precision across varying workloads without external intervention or reconfiguration

Inventive Principle:
Principle #25Self-service

3Speed

If sampling frequency is increased to improve control precision, then real-time responsiveness is improved, but power consumption increases

Engineering Contradiction:
Improvereal-time responsivenessVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent dynamically adjusts the sampling frequency based on detected workload characteristics and control error levels. During high-priority workloads or large error conditions, sampling frequency increases to improve responsiveness. During low-priority or stable conditions, sampling frequency decreases to reduce power consumption, achieving an optimal balance between responsiveness and energy usage

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9389853B2Adaptive control of processor performance
Publication Date: 2016.07.12 ADVANCED MICRO DEVICES INC
  • US9389853B2 patent drawing
  • US9389853B2 patent drawing
  • US9389853B2 patent drawing

AI summary

Embodiments include a method, system and an article of manufacture for configuring at least one processor. These include changing a sampling frequency of at least a portion of a control loop coupled to the processor in response to a change in a current input workload, determining a current error of the processor after the changing, and adjusting one or more of a clock rate and a voltage of the processor to reduce a difference between the current error and a desired error.