Adaptive Concatenated ECC for Uneven Flash Memory Error Rates
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Solution Overview
Problem
Flash memory devices face performance loss due to symmetric error correction codes that provide the same protection for each bit, failing to account for varying error probabilities among memory cells, leading to sub-optimal performance.
Innovation Solution
Adaptive Generalized Concatenated Codes (A-GCC) are introduced, providing different protection levels for different parts of the code word without requiring additional power or multiple code words, using constituent codes like polar codes and RS codes tailored to varying channel qualities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If symmetric error correction codes are used to protect each bit uniformly, then implementation simplicity is maintained, but performance is degraded due to varying error probabilities among memory cells
Solution Approach 1:
The code word is divided into multiple segments, each protected by a different constituent code from the GCC family. This segmentation allows each segment to receive tailored error protection appropriate to its specific error probability characteristics, resolving the contradiction by enabling differentiated protection without requiring a completely new code structure.
Solution Approach 2:
Different portions of the code word are assigned different error protection levels based on their local error probability characteristics. High-error-probability segments receive stronger protection while low-error-probability segments receive lighter protection, optimizing overall reliability without uniformly increasing complexity across the entire code structure.
2Reliability
If different protection levels are applied to different bits, then error correction performance is improved, but additional power or multiple code words would be required
Solution Approach 1:
The GCC encoding structure is designed to provide multiple protection levels within a single unified code word, eliminating the need for separate code words or additional power-consuming mechanisms. The constituent codes work together in a multi-functional framework that achieves differentiated protection efficiently.
Solution Approach 2:
The error protection level for each segment is controlled by changing code parameters (such as code rate, block length, or constituent code selection) rather than adding physical resources or power. This allows adaptive protection levels to be achieved through parameter optimization within the existing GCC framework.
3Productivity
If uniform error protection is provided for all bits, then code simplicity is maintained, but performance loss occurs due to not accounting for varying channel qualities
Solution Approach 1:
The GCC code structure enables dynamic adaptation to varying channel qualities by selecting different constituent codes and parameters based on the error characteristics of different memory cell segments. This dynamic capability allows the system to optimize storage efficiency for each segment according to its specific channel conditions.
Solution Approach 2:
Different code parameters (code rate, block length, constituent code type) are changed for different segments to match their specific channel qualities. This parameter adaptation enables the system to achieve optimal storage efficiency and reliability for each segment without requiring a completely different coding scheme.
Data Source
AI summary
Methods, devices, and systems for controlling a storage system, including: a storage device configured to store a plurality of code words; and at least one processor configured to: obtain information bits; encode the information bits using a first code to obtain a first plurality of code words; encode the first plurality of code words using a second code to generate a second plurality of code words; update the first plurality of code words based on the second plurality of code words to generate an adaptive generalized concatenated code (A-GCC) code word; and store the A-GCC code word in the storage device, wherein each code word of the first plurality of code words is encoded using a different error protection level.