Memory ECC Operation with Adaptive Parity Allocation
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Solution Overview
Problem
Existing memory devices face challenges in optimizing power consumption and error correction efficiency due to varying physical and electrical characteristics of memory cells over their life cycle, leading to excessive power consumption when using fixed high ECC protection levels.
Innovation Solution
Adaptive ECC protection level adjustment based on the status of memory cells, dynamically selecting the number of parity cells and ECC correction capability to match the current health of the cells, reducing power consumption by minimizing the use of ECC circuitry when lower protection is sufficient.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC is calibrated on end-of-life reliability status with highest correction power, then reliability is improved, but power consumption increases excessively
Solution Approach 1:
The ECC correction power is made dynamic rather than fixed. The system adjusts the ECC protection level based on the actual status of memory cells during their life cycle, transitioning from static high-level protection to adaptive variable protection. This resolves the contradiction by applying maximum correction power only when necessary (at end-of-life) while using lower power modes during earlier stages.
Solution Approach 2:
The patent changes the parameter of ECC correction capability from a fixed maximum value to a variable value that adapts to cell status. By monitoring memory cell characteristics and adjusting the ECC protection level accordingly, the system maintains reliability requirements while optimizing power consumption across different operational phases.
2Reliability
If fixed high ECC protection level is used throughout memory life cycle, then reliability is maintained, but power consumption is excessive
Solution Approach 1:
Instead of applying full ECC protection continuously, the system applies partial protection appropriate to the current cell status. The ECC correction power is adjusted to match actual needs, avoiding excessive action during early memory life when cells are still healthy, thereby reducing unnecessary power consumption while maintaining adequate protection.
Solution Approach 2:
The system implements feedback mechanisms to monitor memory cell status and adjust ECC protection levels accordingly. By continuously assessing cell health and adapting the correction power in response, the system avoids maintaining high protection levels when they are not needed, thus eliminating wasteful power consumption while preserving data integrity.
3Use of energy by moving object
If ECC correction power is reduced to lower power consumption, then power efficiency improves, but reliability may be compromised
Solution Approach 1:
The ECC correction power dynamically adapts to match actual error rates and cell conditions. Rather than using a static low-power setting that might compromise reliability, the system increases correction power when errors are detected or cell degradation is observed, ensuring reliability is maintained while optimizing power consumption during normal operation.
Solution Approach 2:
The system changes the ECC correction capability parameter based on monitored cell status. When cells are healthy, lower correction power is used to save energy; when degradation or errors are detected, the correction power is increased to maintain reliability. This adaptive parameter adjustment resolves the contradiction between power efficiency and reliability.
Data Source
AI summary
The present disclosure relates to operating an array of memory cells, including storing user data in a plurality of memory cells of the memory array, storing parity data associated with the user data in parity cells of the memory array, in which a number of used parity cells is selected based on a status of the memory cells and is related to a selected Error Correction Code (ECC) correction capability, and performing an ECC operation on the plurality of memory cells, the ECC correction capability being based on the selected number of used parity cells. Related memory devices and systems are also herein disclosed.