Adaptive Edge Recognition for Manchester Signal Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices face challenges in accurately detecting edges in Manchester-coded signals due to jitter-induced delays, leading to incorrect edge detection and decoding errors, especially when the sampling frequency is lower than the data transmission frequency, and synchronization between transmission and reception sides is difficult to achieve.
Innovation Solution
A semiconductor device with a data reception circuit and an edge recognition circuit that measures the time difference between receiving consecutive data and adjusts the data detection range based on this measurement to correct for jitter-induced delays, allowing for accurate edge detection without the need for high sampling frequencies or phase-locked loop synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a sufficiently-large sampling frequency is set to prevent incorrect edge detection, then edge detection accuracy is improved, but device complexity and cost increase due to requiring high-frequency sampling circuits
Solution Approach 1:
The patent applies dynamics by making the detection range variable rather than fixed. The edge recognition circuit dynamically adjusts the detection range based on the measured period between consecutive data signals. This allows the system to adapt to jitter-induced timing variations without requiring high sampling frequencies, resolving the contradiction between detection accuracy and circuit complexity
Solution Approach 2:
The patent changes the parameter of detection range based on the measured period. By calculating the period between consecutive data signals and adjusting the detection range accordingly, the system maintains accurate edge detection under varying jitter conditions without needing high-frequency sampling circuits, thus resolving the technical contradiction
2Measurement precision
If clock synchronization is taken between transmission and reception sides to prevent incorrect edge detection, then edge detection accuracy is improved, but device complexity increases due to requiring PLL circuits
Solution Approach 1:
The patent extracts the essential timing information (period between consecutive data signals) from the received signal and uses only this information to adjust the detection range. This eliminates the need for complex PLL synchronization circuits while maintaining edge detection accuracy, as the system only needs to measure local timing characteristics rather than maintain full clock synchronization
Solution Approach 2:
The system performs self-adjustment by measuring the period between consecutive data signals it receives and automatically adjusting its own detection range based on this measurement. This self-service approach replaces complex external synchronization circuits with a simple autonomous adjustment mechanism, resolving the contradiction between accuracy and complexity
3Device complexity
If the detection range is fixed to simplify the edge recognition circuit, then device complexity is reduced, but edge detection accuracy deteriorates under jitter conditions
Solution Approach 1:
The patent implements dynamics by making the detection range adjustable rather than fixed. The edge recognition circuit measures the period between consecutive data signals and dynamically adjusts the detection range to match the actual timing characteristics. This dynamic adjustment maintains detection accuracy under jitter while keeping the circuit relatively simple, resolving the contradiction between complexity and accuracy
Data Source
AI summary
The present invention is to reduce detection of an erroneous edge caused by variation in a case of a sampling frequency that is not larger than a data transmission frequency. A semiconductor device includes: a data reception circuit configured to receive first data at first time and receive second data at second time; and an edge recognition circuit configured to set a range and detect an edge contained in the range. The edge recognition circuit includes a measurement circuit configured to measure a first period taken from the reception of the first data to the reception of the second data, and is configured to determine the range in which the edge contained in the data that is received by the data reception circuit is detected, on the basis of the first period.