Adaptive Equalizer Circuit With Adjustable Pole Frequencies
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing equalizer circuits fail to provide adjustable gain boosts within 0 dB-15 dB for varying channel attenuations due to differences in protocols and rates, leading to excessive power consumption and inadequate compensation.
Innovation Solution
An equalizer circuit with a current source, RC network, differential transistor pair, and adjustable active inductor, controlled by a decoder and controller, allows dynamic adjustment of dominant and non-dominant poles to accommodate different protocols and rates, enabling adjustable gain boosts within 0 dB-15 dB.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequency peaking is designed as 10 GHz with maximum gain boost at 15 dB, then USB 4.0 channel attenuation is compensated, but gain boost at USB 3.2 Nyquist frequency (5 GHz) is far less than 15 dB, leading to limited application to serious channel attenuation
Solution Approach 1:
The patent implements dynamic adjustment of the equalizer circuit by making the dominant pole and non-dominant pole frequencies可调 (adjustable). The control component receives control signals and adjusts the frequencies of poles dynamically based on different protocol requirements (USB 3.2 vs USB 4.0), enabling the circuit to adapt to different channel attenuation characteristics rather than being fixed at a single frequency peaking point
Solution Approach 2:
The patent changes the parameters of the equalizer circuit by adjusting the frequencies of the dominant pole and non-dominant pole. The control component modifies these pole frequencies as control parameters to achieve different gain boost characteristics suitable for different protocols and channel conditions, transforming a fixed-parameter circuit into a variable-parameter system
2Reliability
If frequency peaking is designed as 5 GHz with maximum gain boost at 15 dB, then USB 3.2 channel attenuation is compensated, but gain boost at 10 GHz is much greater than 15 dB, causing excessive power consumption
Solution Approach 1:
The patent uses dynamic pole frequency adjustment to avoid excessive gain boost at frequencies where it is not needed. By controlling the frequencies of dominant and non-dominant poles dynamically, the circuit can limit the gain boost at 10 GHz when operating at USB 3.2 rates, thereby reducing unnecessary power consumption while maintaining effective compensation at the target frequency
Solution Approach 2:
The control component implements a feedback mechanism where control signals adjust the pole frequencies based on the operating conditions. This feedback control ensures that the equalizer circuit operates efficiently by adjusting its characteristics to match the actual channel attenuation requirements, preventing excessive power consumption from unnecessary gain boosting
3Adaptability or versatility
If gain boost is designed to be adjustable within 0 dB-15 dB for long and short channels, then channel variation is covered, but minimum gain boost cannot be covered when frequency peaking is designed for maximum bandwidth
Solution Approach 1:
The patent employs dynamic adjustment of both pole frequencies and gain boost levels. The control component can independently adjust the frequencies of dominant and non-dominant poles as well as the gain boost amount, enabling the circuit to achieve minimum gain boost coverage even when frequency peaking is optimized for maximum bandwidth scenarios
Data Source
AI summary
Disclosed in the disclosure is an equalizer circuit. The equalizer circuit includes a current source component, a resistance-capacitance (RC) network, and a differential transistor pair, where the current source component is electrically connected to the RC network, and the RC network is electrically connected to the differential transistor pair; and the equalizer circuit further includes an adjustable active inductor component electrically connected to a first transistor and a second transistor of the differential transistor pair separately; and a control component electrically connected to the current source component, the RC network, and the adjustable active inductor component separately and configured to change frequencies of a dominant pole and a non-dominant pole of the equalizer circuit by adjusting performance parameters of the current source component, the RC network, and the adjustable active inductor component.


