Adaptive Syndrome Computation in Low-Power FEC Decoders
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional forward error correction decoding systems are power-hungry, slow, expensive, and inflexible, as they compute a fixed number of syndromes regardless of channel conditions, leading to unnecessary power consumption.
Innovation Solution
A low-power block code forward error correction decoder that dynamically adjusts the number of syndrome compute units and processing elements based on current channel conditions, using a subset of circuits only when fewer syndromes are necessary for reliable decoding, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed number of syndrome compute units are used in conventional FEC decoders, then reliable decoding is achieved under worst-case channel conditions, but power consumption increases unnecessarily under better channel conditions
Solution Approach 1:
The patent applies dynamics by making the number of active syndrome compute units variable rather than fixed. The decoder dynamically adjusts the quantity of operational compute units based on real-time channel quality assessment, transitioning from a static architecture to an adaptive one that responds to changing environmental conditions
Solution Approach 2:
The patent changes the operational parameter of the decoder by varying the number of active syndrome compute units. Instead of operating at a constant configuration, the system modifies its computational resources based on channel conditions, implementing a parameter-driven adaptation strategy
2Stability of the object's composition
If a fixed number of syndrome compute units are used in conventional FEC decoders, then consistent decoding performance is maintained, but device flexibility is reduced
Solution Approach 1:
The system transitions from a static to a dynamic configuration, where the decoder's computational structure adapts to channel conditions while maintaining stable decoding performance through controlled adjustment of active compute units
3Reliability
If all syndrome compute units are activated, then decoding reliability is maximized for worst-case channels, but processing speed for better channels is unnecessarily reduced
Solution Approach 1:
The patent implements partial action by activating only the necessary subset of syndrome compute units required for the current channel conditions. Instead of always using the full computational capacity, the system applies just enough processing power to achieve reliable decoding, avoiding excessive computation
Data Source
AI summary
A system comprises a forward error correction decoder comprising syndrome computation circuitry, key-equation solver circuitry, and search and evaluator circuitry. The syndrome computation circuitry may comprise a plurality of syndrome compute units connected in parallel. The syndrome computation circuitry may be dynamically configurable to vary a quantity of the syndrome compute units used for processing of a codeword based on conditions of a channel over which the codeword was received. The syndrome computation circuitry may be operable to use a first quantity of the syndrome compute units for processing of a first codeword received over the channel when the channel is characterized by a first bit error rate and a second quantity of the syndrome compute units for processing of a second codeword received over the channel when the channel is characterized by a second bit error rate.