Adaptive FIFO Buffer Using Random Sequences for Shared Memory
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Solution Overview
Problem
Conventional FIFO buffer systems for multi-channel communications devices require excessive memory and incur high costs due to the need for dedicated memory blocks, especially as the number of channels increases, and dynamic memory assignment approaches add complexity and cost with additional logic and hardware.
Innovation Solution
A FIFO buffer system utilizing random sequences to store and retrieve data from shared memory blocks, where each channel uses a unique random sequence to assign and retrieve data, eliminating the need for a block index table and reducing memory requirements by allowing non-sequential storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated memory blocks are allocated to each channel, then reliability is improved, but memory requirements and cost increase significantly
Solution Approach 1:
Multiple FIFO channels share a common memory pool instead of having dedicated memory blocks. The memory is dynamically allocated to different channels based on their current bandwidth requirements, allowing efficient utilization of the shared resource while maintaining data integrity for each channel.
Solution Approach 2:
The memory allocation is dynamic rather than static. Each channel can access different portions of the memory pool at different times based on its current traffic demands. The system adapts memory distribution in real-time to match channel utilization patterns.
2Productivity
If dynamic memory assignment is implemented, then memory utilization is improved, but device complexity increases due to additional logic and hardware
Solution Approach 1:
Each FIFO channel maintains its own random sequence generator and uses its generated sequence to independently access the shared memory pool. This self-service approach eliminates the need for a centralized block index table or complex arbitration logic, as each channel autonomously manages its own memory access patterns.
Solution Approach 2:
The mechanical system of centralized memory management with block index tables is replaced by a distributed approach where each channel uses software-generated random sequences for memory addressing. This substitution eliminates complex hardware logic while maintaining efficient memory utilization.
3Adaptability or versatility
If the number of channels is increased, then system capacity is improved, but total memory requirements increase proportionally
Solution Approach 1:
A single shared memory pool serves multiple FIFO channels simultaneously, making the memory system universal rather than dedicated to a single channel. This multi-functional memory structure allows the same physical memory resources to be reused across different channels at different times.
Solution Approach 2:
The system changes the addressing parameter from fixed dedicated blocks to dynamic random sequences. This parameter change allows the same memory locations to be accessed by different channels at different times, enabling the memory pool to scale with channel count without linearly increasing total memory requirements.
Data Source
AI summary
A first in, first out (FIFO) buffer system includes memory with a plurality of memory blocks. A first FIFO control module generates and assigns a first random sequence to the memory blocks and stores first data in the memory blocks according to the first random sequence. A second FIFO control module generates and assigns a second random sequence to the memory blocks that is different than the first random sequence and stores second data in the memory blocks according to the second random sequence.