Adaptive FIFO for Variable-Length Data
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Prior art synchronous FIFOs are inefficient when dealing with high write clock speeds and variable-length data, as they fail to optimize storage and retrieval efficiently.
Innovation Solution
A synchronous FIFO that latches variable-length data at a write clock speed, combines it with partial-row data, and stores it in the FIFO storage array, using indicators for data length and offsets to manage write and read pointers, operating at a read clock speed that is a fraction of the write clock speed to efficiently handle variable-length data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If prior art synchronous FIFOs use standard storage arrays without latch stages, then the circuit structure is simpler, but they become inefficient when dealing with high write clock speeds and variable-length data
Solution Approach 1:
The input data path is segmented into multiple latch stages (first latch stage, second latch stage, etc.) that operate at different times. Each latch stage captures portions of the input data at different clock edges, allowing the system to handle variable-length data efficiently while maintaining a manageable circuit structure through modular segmentation of the data collection process
2Productivity
If the read clock speed is the same as write clock speed, then the FIFO operates at maximum speed, but it cannot efficiently handle variable-length data from different latch stages
Solution Approach 1:
The system dynamically adjusts the read clock speed based on the actual data length and the state of latch stages. The read clock operates at a fraction of the write clock speed (RCLK = WCLK/N), allowing the FIFO to adaptively collect data from multiple latch stages and combine them efficiently, thereby handling variable-length data while maintaining acceptable throughput performance
3Productivity
If the FIFO stores complete rows only, then the storage structure is simpler, but it cannot efficiently store variable-length data with different lengths
Solution Approach 1:
The FIFO allows partial filling of rows with variable-length data. When data from latch stages needs to be stored, the system can store complete rows or partial rows as needed, combining data from multiple latch stages into a single row or spreading them across multiple rows. This partial action approach enables efficient storage of variable-length data while maintaining row-based storage simplicity through flexible row utilization
Data Source
AI summary
An adaptive synchronous FIFO includes a plurality of input data latch stages that sample variable-length input data at a write clock frequency, and a data compression circuit that combines the variable-length input data, together with partial-row data from a row of the FIFO storage array, and writes the combined data at a read clock frequency. The number of data latch stages is adaptive according to the ratio of the read and write clock frequencies.