Adaptive Digital Filter Feedforward for Fast Interference Response
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Solution Overview
Problem
Existing receiver circuits for mobile communication devices face inefficiencies in automatic gain control (AGC) due to slow signal strength detection in the digital domain and the need for complex analogue circuitry when measuring input power before the ADC, which affects power consumption and filtering performance.
Innovation Solution
A circuit with an analogue to digital converter (ADC) and an adaptable digital filter that detects unwanted signal information from the input or digital signal before filtering and feeds this information forward to the filter, allowing for rapid adaptation and reducing power consumption by combining decimation and channel filtering operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If signal strength detection is performed in the digital domain after the ADC, then the detection can be implemented with digital circuitry, but the response speed is slow due to the processing delay
Solution Approach 1:
The patent performs preliminary detection of signal strength and interference levels using the digital output from the ADC before the main digital signal processing. This preliminary action allows the system to quickly detect changes in signal conditions and adjust filtering parameters in advance, thereby improving response speed while maintaining detection accuracy.
2Speed
If analogue circuitry is used to measure input power before the ADC, then the response speed is fast, but the device complexity increases
Solution Approach 1:
The patent replaces complex analogue measurement circuitry with a simplified digital detection approach. The digital output from the ADC is used to determine signal strength and interference levels through digital processing, eliminating the need for complicated analogue power measurement circuits while maintaining fast response capability.
Solution Approach 2:
The patent introduces an intermediary digital signal path that bridges the ADC output and the filtering control mechanism. This intermediary digital representation of signal strength allows for fast detection without requiring complex analogue circuitry, as the digital signal can be processed quickly to control the adaptable filter.
3Object-affected harmful factors
If the digital filter bandwidth is reduced to improve adjacent channel rejection, then the filtering performance improves, but the signal processing capability is reduced
Solution Approach 1:
The patent implements a dynamic filter bandwidth adjustment mechanism where the digital filter bandwidth is adaptively changed based on detected interference levels. When adjacent channel interference is detected, the filter bandwidth is reduced to improve rejection. When interference is low, the bandwidth is increased to maintain signal processing capability. This dynamic adaptation resolves the contradiction by making the filter characteristics variable rather than fixed.
Solution Approach 2:
The patent changes the filter parameters (bandwidth) based on the detected signal conditions. The adaptable digital filter modifies its bandwidth parameter in response to interference levels, allowing the system to optimize between adjacent channel rejection and signal processing capability depending on the operational context.
Data Source
AI summary
A receiver uses a sigma delta ADC (126) and an adaptable digital filter (132). Detector circuitry detects information about unwanted parts of the signal from an oversampled digital signal, before the filtering, and feeds forward the detected information to the filter, to adapt the filter. By feeding forward the detection information, rather than feeding back an output of the filter, the adaptation can respond much more quickly to rapid changes in the unwanted interference. This enables reduced filtering to save power when interference is low, without risking a sudden increase in interference causing an avalanche of errors before the filter can be adapted correctly. The filter receives the oversampled digital signal combines decimation and channel filtering in one stage.