Adaptive Filter Tap Grouping for Lower Equalization Complexity
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Solution Overview
Problem
Adaptive filters in communication devices require a large memory and computation circuits to effectively equalize channel effects, leading to increased hardware complexity and power consumption, making it challenging to balance performance and resource requirements, especially in systems like ATSC digital television where long filter lengths are necessary.
Innovation Solution
The adaptive filter design includes computation groups with data and parameter memory units, a control circuit to dynamically configure parameter storage and computation resources based on equalization parameter values, and a parameter updating circuit to optimize filter outputs and parameters, allowing for efficient resource allocation and reduced complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the length of the adaptive filter is increased to effectively equalize channel effects, then the demodulation performance is improved, but the hardware requirement and computation complexity increase
Solution Approach 1:
The adaptive filter is divided into multiple computation groups, each processing a subset of filter taps. This segmentation allows the filter to achieve long filter length for good demodulation performance while distributing the computational load across multiple manageable units, reducing the complexity of individual processing blocks and enabling parallel implementation.
Solution Approach 2:
The filter dynamically adjusts the number of active computation groups and filter taps based on channel conditions. When channel variations are mild, fewer computation groups are activated, reducing power consumption and complexity. When channel variations are severe, more computation groups are activated to maintain demodulation performance, thus adapting the hardware utilization to actual needs.
2Reliability
If the length of the adaptive filter is increased to equalize channel effects, then the demodulation performance is improved, but the power consumption increases due to heat dissipation
Solution Approach 1:
The system dynamically activates or deactivates computation groups based on channel variation severity. This dynamic adaptation ensures that power consumption scales with actual channel conditions rather than operating at maximum capacity continuously, reducing unnecessary power consumption while maintaining adequate demodulation performance under varying conditions.
Solution Approach 2:
The filter changes operational parameters (number of active taps, number of active computation groups) based on channel conditions. By adjusting these parameters dynamically, the system optimizes the trade-off between demodulation performance and power consumption, consuming more power only when channel conditions require it.
3Device complexity
If the length of the adaptive filter is shortened to reduce hardware requirement and computation complexity, then the hardware requirement and computation complexity are reduced, but the demodulation performance degrades
Solution Approach 1:
Rather than using a fixed short filter length, the system dynamically adjusts the effective filter length by activating different numbers of computation groups based on channel conditions. This allows the filter to use short lengths when channels are stable (reducing complexity) and extend to long lengths when channels vary dramatically (maintaining performance), thus resolving the contradiction between fixed filter length and adaptive requirements.
4Reliability
If the number of taps in the adaptive filter is increased to equalize channel effects, then the equalization capability is improved, but the computation circuits and memory requirements increase
Solution Approach 1:
The filter taps are organized into multiple computation groups with dedicated data memory units and parameter memory units for each group. This segmentation allows the system to achieve high equalization capability with many total taps while keeping individual computation blocks manageable in size, enabling parallel processing that reduces the complexity burden on any single circuit block.
Data Source
AI summary
An adaptive filter is disclosed, having a plurality of computation groups, a plurality of computation circuits, a summation circuit, a slicer circuit, an updating circuit, and a control circuit. Each computation group corresponds to an equalization parameter and has a plurality of memory cells. When the corresponding equalization parameter of a computation group is greater than a predetermined value, the control circuit configures the computation group and the computation circuit to collaboratively generate an output of the computation group. The summation circuit sums up the outputs of the computation groups to produce a filter output. The slicer circuit generates a slicer output according to the filter output. The updating circuit updates the equalization parameters according to the filter output and the slicer output.