Adaptive Frequency Compensation in Linear Voltage Regulators
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Solution Overview
Problem
Conventional high speed linear voltage regulators require large external decoupling capacitors, which are costly and occupy significant space, and struggle with stability issues due to reduced bandwidth in active mode and potential instability in sleep mode.
Innovation Solution
The implementation of a high speed linear voltage regulator with adaptive frequency compensation using switchable bias currents and a frequency compensation circuit that adjusts components for active and sleep modes, allowing for a smaller external decoupling capacitor and enhanced bandwidth, stabilizing the regulator in both modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high speed linear voltage regulators use large external decoupling capacitors, then stability is improved, but device area and cost increase
Solution Approach 1:
The patent changes the frequency compensation parameters dynamically by switching between different bias current configurations. In active mode, higher bias currents create left-hand-side zeros that extend bandwidth and maintain stability. In sleep mode, lower bias currents reduce power consumption while maintaining stability through appropriate compensation. This dynamic parameter adjustment eliminates the need for large decoupling capacitors.
Solution Approach 2:
The patent implements dynamic frequency compensation by switching bias current configurations based on operational mode. The compensation circuit adapts its characteristics in real-time: using higher bias currents in active mode for maximum bandwidth and stability, and lower bias currents in sleep mode for power efficiency. This dynamic adaptation replaces the static approach of using large fixed capacitors.
2Speed
If switchable bias currents are used to extend bandwidth in active mode, then operational speed is improved, but power consumption increases
Solution Approach 1:
The patent dynamically switches between different bias current configurations based on the operational mode. In active mode, higher bias currents (first and second bias currents) are used to maximize bandwidth and operational speed. In sleep mode, lower bias currents are used to minimize power consumption. This dynamic switching allows the system to optimize for speed when needed and for power efficiency when the load is light.
Solution Approach 2:
The patent changes the bias current parameters adaptively based on operational requirements. The first bias current is switched between a first level (for active mode) and a second level (for sleep mode). Similarly, the second bias current is switched between corresponding levels. This parameter adaptation allows the system to achieve high speed performance when needed while consuming minimal power during low-activity periods.
Data Source
AI summary
In a linear voltage regulator, a first stage outputs an output signal. The first stage is configured with a first switchable bias current, and is configured to receive a feedback signal. A second stage provides a regulated voltage output. A decoupling capacitor is coupled to the regulated voltage output. A feedback circuit is coupled with the second stage and configured to generate the feedback signal. A frequency compensation circuit includes a second switchable bias current. The frequency compensation circuit: pushes away an existing pole to a higher frequency when the first and second switchable bias currents are operated in a sleep mode; and creates a left-hand-side zero when the first and second switchable bias currents are operated in an active mode. The active mode comprises the first and second switchable bias currents supplying greater currents than are provided in the sleep mode.