Adaptive Frequency Measurement Circuit for DCO Gain Normalization
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Solution Overview
Problem
Digital phase-locked loops face challenges in compensating for digitally-controlled oscillator (DCO) gain variations due to process, voltage, and temperature (PVT) variations, leading to errors in frequency and phase output signals.
Innovation Solution
A method and system for DCO gain normalization, which involves determining a scaling factor to adjust loop filter gain constants, using calibration circuitry to identify the DCO operating point and apply a scaling factor to normalize DCO gain, thereby minimizing PVT-induced errors and reducing PLL lock time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional DCO circuits generate periodic output using a digital-to-analog frequency mapping curve, then the circuit can operate across various frequencies, but DCO gain variation occurs under PVT variations introducing error in frequency and phase output
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the frequency mapping curve parameters based on measured PVT conditions. The system modifies the digital-to-analog conversion characteristics in response to detected process, voltage, and temperature variations, thereby maintaining frequency accuracy across different operating conditions while preserving wide frequency range capability
2Reliability
If traditional PLL locking methods are used, then the circuit can achieve frequency lock, but the locking time takes hundreds of reference clock cycles
Solution Approach 1:
The patent implements preliminary action by performing frequency measurements and PVT characterization before the PLL locking process begins. The system pre-determines optimal frequency mapping parameters and compensation values based on initial measurements, so that when locking is initiated, the DCO is already configured with corrected parameters, reducing lock time from hundreds to less than 30 reference clock cycles
3Measurement precision
If DCO gain normalization is implemented to compensate for PVT variations, then frequency accuracy is improved, but additional measurement and calibration circuitry is required
Solution Approach 1:
The patent merges the frequency measurement function with the PLL locking process itself. The same counter and timing circuitry used for PLL operation is utilized to measure DCO frequency and characterize PVT variations. This integration eliminates the need for separate dedicated measurement circuitry, achieving accurate DCO gain normalization while minimizing additional device complexity
Data Source
AI summary
A frequency measurement circuit includes a counter circuit to receive a first digitally-controlled oscillator (DCO) clock signal corresponding to a first DCO input codeword and a measurement signal. The counter circuit is responsive to the measurement signal to generate a count representing a measured frequency of the first DCO clock signal. A control circuit is configured to selectively adjust a parameter of the measurement signal for generating a second count of a second DCO clock signal corresponding to a second DCO codeword. The control circuit selectively adjusts the parameter based on a received control signal.