Adaptive Gate Bias Control for Power Semiconductor Gate Oxide Aging
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Solution Overview
Problem
Power semiconductor modules, particularly SiC MOSFETs, face significant reliability issues due to gate oxide degradation, which leads to increased failure probability, conduction losses, and catastrophic failures, exacerbated by bias temperature instability and charge trapping, especially in high-frequency and high-temperature conditions.
Innovation Solution
A method is proposed to monitor and adapt the gate oxide health by acquiring initial and current state values, adjusting gate voltages and delay times to apply controlled gate voltages during turn-on and turn-off, thereby reducing charge trapping and maintaining output characteristics, using a control signal to manage the semiconductor elements based on acquired health values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a negative bias is applied to the gate to avoid self-turn-on during switching, then device reliability is improved, but threshold voltage decreases significantly over time leading to critical variations during converter start-up
Solution Approach 1:
The patent implements dynamic adjustment of gate voltage parameters based on real-time monitoring of device health status. The control system continuously adapts the gate voltage magnitude and application duration according to the acquired state of health values, transforming the static negative bias approach into a dynamic control strategy that maintains reliability while preventing excessive threshold voltage drift
Solution Approach 2:
The patent employs feedback control by monitoring the state of health of the gate oxide through acquired values and using this information to adjust subsequent gate voltage applications. The control system modifies the gate voltage parameters based on the feedback from health status monitoring, creating a closed-loop system that prevents threshold voltage from drifting beyond acceptable ranges while maintaining reliability protection
2Reliability
If gate oxide field is limited in blocking mode and on-state to improve substrate defect density, then reliability is improved, but conduction losses increase
Solution Approach 1:
The patent applies gate voltage in a partial and controlled manner rather than continuously. By applying gate voltage only during specific periods (turn-on and turn-off transitions) and for limited durations based on the acquired state of health values, the system provides sufficient stress to address substrate defects while minimizing the time during which elevated gate voltage causes increased conduction losses
Solution Approach 2:
The patent implements periodic monitoring and adjustment of gate voltage parameters based on the operational cycle of the power semiconductor device. The gate voltage is applied periodically during switching transitions rather than continuously, allowing the device to operate with normal parameters during steady states while receiving beneficial stress during transitions to address substrate defects without sustained energy loss
3Reliability
If voltage spikes are avoided to maintain gate oxide quality, then reliability is improved, but switching speed decreases
Solution Approach 1:
The patent dynamically changes the gate voltage parameters (magnitude, duration, timing) based on the acquired state of health values. By adjusting these parameters in real-time, the system can apply sufficient voltage to maintain gate oxide quality during critical transitions while preventing excessive voltage spikes that would slow down switching, optimizing both reliability and switching speed through adaptive parameter control
Data Source
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AI summary
A treatment method of a power semi-conductor module (1) comprising at least one semiconductor element (11) including a Metal-Oxide-Semiconductor element and/or a Metal-Insulator-Semiconductor element, said method comprising: a. acquiring a first value Vsoh,0 corresponding to an initial state of health of a gate oxide of the module (1); b. acquiring a second value Vsoh,X corresponding to a current state of health of a gate oxide of the module (1); c. deducing an ON-state gate voltage Vcc or an OFF-state gate voltage gate voltage VEE, and a delay time of the turn-on tON or a delay time of the turn-off tOFF in function of said acquired first value Vsoh,0 and said second value Vsoh,X; d. generating at least one control signal (CTRL) configured to apply the deduced gate voltage Vcc or VEE to the module (1) during the deduced delay time tON or tOFF.