Adaptive Guided Scrambling Encoder for Memory Systems

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Solution Overview

Problem

Memory systems face challenges in reducing bit error rates, particularly in storage devices like TLC NAND-type flash memory, where bit error rates vary significantly based on the stored bit value and storage location, leading to inefficiencies in data retrieval and storage.

Innovation Solution

A memory system incorporating an encoder that uses adaptive guided scrambling to determine the number of random sequences based on storage area position information, scrambling data bits to generate sequences with the lowest number of logic values, thereby reducing bit error rates by selecting the optimal scrambled sequence for storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data bits are stored using conventional encoding methods, then storage capacity is maintained, but bit error rates increase due to weak bits in certain storage locations

Engineering Contradiction:
Improvebit error rateVSAvoidencoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encoder dynamically adjusts the number of random sequences used for scrambling based on position information from storage areas. The controller determines whether to use one or multiple random sequences depending on the specific storage location, making the encoding process adaptive rather than static. This dynamic approach optimizes reliability for each storage area while managing encoder complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of random sequence selection based on storage area characteristics. By analyzing position information and selecting appropriate random sequences (changing the encoding parameter), the system reduces bit error rates in problematic storage locations without uniformly increasing complexity across all storage areas.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple random sequences are used for scrambling, then bit error rates are reduced, but processing time and computational resources increase

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidencoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system applies partial action by using multiple random sequences only when necessary, based on position information analysis. For storage areas with lower error rates, a single random sequence suffices. For problematic areas, multiple sequences are applied. This partial application of the more complex encoding method reduces overall processing time while maintaining reliability where needed.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

Different encoding quality is applied to different storage areas based on their characteristics. Position information identifies which storage areas require enhanced encoding (multiple random sequences) and which can use standard encoding (single sequence). This local quality approach optimizes the balance between reliability and processing time by concentrating computational resources where most needed.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If adaptive guided scrambling is implemented, then retrieval accuracy improves, but device complexity increases due to multiple processing steps

Engineering Contradiction:
Improveretrieval accuracyVSAvoidencoder structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The encoding process is segmented into distinct functional blocks: a random sequence generation block, a scrambling block, and a selection block. Each block performs a specific function in the adaptive guided scrambling process. This segmentation makes the complex process more manageable and implementable by dividing it into modular, reusable components with clear interfaces.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The encoder structure is designed with multi-functional blocks that can handle different encoding requirements. The random sequence generation and scrambling blocks can operate with one or multiple sequences based on position information, making the same hardware/software structure universally applicable to all storage areas regardless of their specific error characteristics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10991409B2Encoder for memory system and method thereof
Publication Date: 2021.04.27 SK HYNIX INC
  • US10991409B2 patent drawing
  • US10991409B2 patent drawing
  • US10991409B2 patent drawing

AI summary

An encoder for use in a memory system receives data bits and position information regarding a storage area among storage areas of a memory device in which the data bits are to be stored, determining the number of multiple random sequences to be used based on the position information, scrambling the data bits using the determined number of multiple random sequences, to generate scrambled sequences, selecting from among the generated scrambled sequences the scrambled sequence having the lowest number of a particular logic value, and outputting the selected scrambled sequence for storage in the storage area of the memory device.