Adaptive Holdover Clocking With Digital OCXO Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current holdover clock systems based on oven-controlled crystal oscillators (OCXOs) face challenges in achieving high stability due to aging effects and circuit noise, leading to increased system complexity and cost, especially in communication networks requiring precise frequency stability like 2G and 3G wireless networks.

Innovation Solution

A system that includes an oven-controlled crystal oscillator, a phase and frequency detector, a data storage block for model parameters, an adaptive filtering module with digital loop filters and algorithms for updating and predicting frequency variations, and a digitally controlled oscillator to generate a stable holdover clock signal, operating in both normal and holdover modes without voltage control inputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a rubidium crystal oscillator (RbXO) is used to meet strict stability requirements, then clock stability is improved, but system cost increases significantly

Engineering Contradiction:
Improveclock stabilityVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces the expensive rubidium crystal oscillator with a much cheaper oven-controlled crystal oscillator (OCXO). While OCXOs have shorter stability duration and are more susceptible to aging, the system compensates through digital signal processing and adaptive filtering techniques that extend effective stability duration and maintain performance within requirements at lower cost

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Ease of manufacture

If an oven controlled crystal oscillator (OCXO) is used instead of RbXO, then system cost is reduced, but clock stability deteriorates due to aging effects and circuit noise

Engineering Contradiction:
Improvesystem costVSAvoidclock stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent implements a feedback mechanism using a phase and frequency detector that continuously monitors the OCXO output and generates correction signals. The system uses adaptive filtering to process error signals and dynamically adjusts control parameters to compensate for aging effects and noise, thereby maintaining clock stability despite using a lower-cost OCXO

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces the traditional voltage-controlled OCXO (VC-OCXO) with a digitally controlled oscillator (DCO). This substitution eliminates the analog voltage control path that is susceptible to circuit noise, replacing it with digital control signals that are more robust and can be precisely adjusted through software-based adaptive filtering algorithms

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If a voltage controlled OCXO (VC-OCXO) is used with analog voltage control, then frequency adjustment is possible, but accuracy deteriorates due to circuit noise in the voltage signal

Engineering Contradiction:
Improvefrequency adjustment capabilityVSAvoidoutput clock accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent replaces the analog voltage control mechanism with a digital control system. The digitally controlled oscillator uses digital signals instead of analog voltages to adjust frequency, eliminating the noise susceptibility inherent in analog voltage paths while maintaining full frequency adjustment capability through digital signal processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Adaptability or versatility

If discrete circuits are used to implement clock generation systems, then design flexibility is maintained, but system complexity increases

Engineering Contradiction:
Improvedesign flexibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent integrates multiple previously separate functions into a unified digitally controlled oscillator system. The phase-locked loop, adaptive filtering, model parameter storage, and frequency synthesis functions are merged into a single integrated circuit architecture, reducing the number of discrete components and interconnections while maintaining design flexibility through programmable parameters

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7692499B2Digitally compensated highly stable holdover clock generation techniques using adaptive filtering
Publication Date: 2010.04.06 RENESAS ELECTRONICS AMERICA INC
  • US7692499B2 patent drawing
  • US7692499B2 patent drawing
  • US7692499B2 patent drawing

AI summary

A system and method for generating a highly stable holdover clock utilizing an integrated circuit and an external OCXO is presented. The integrated circuit comprises an input reference clock receiver, a phase and frequency detector that generates an error signal between the input reference clock signal and a feedback clock signal, a data storage block that stores model parameters to predict frequency variations of the OCXO, an adaptive filtering module that includes a digital loop filter and algorithms for updating the model parameters and predicting frequency variations based on the model, a switch that enables the system to operate in normal or holdover mode, a digitally controlled oscillator, and a feedback divider.