Adaptive IC Tuning With Error Prediction for Lower Power

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Solution Overview

Problem

Integrated circuits often consume excessive power due to conservative design approaches that account for rare worst-case variability scenarios, leading to inefficient power usage.

Innovation Solution

The implementation of a method and apparatus that includes a monitored path with circuit elements, a transition detection module, and an error prediction module within an integrated circuit, allowing for adaptive tuning of voltage or frequency to minimize power consumption while ensuring proper operation by detecting potential errors and adjusting parameters before failures occur.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conservative supply voltage is selected to ensure correct operation under all possible variations, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvecorrect operationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage and frequency scaling by monitoring actual circuit operation in real-time. The system transitions from static conservative voltage selection to dynamic adjustment based on actual performance, allowing voltage to be lowered when margins are sufficient and raised when approaching error thresholds, thus resolving the contradiction between reliability and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms through error detection modules that continuously monitor circuit operation and provide information about actual performance margins. This feedback enables the system to adjust voltage and frequency settings based on real-time conditions, optimizing the balance between reliability and power consumption rather than relying on pre-determined conservative settings

Inventive Principle:
Principle #23Feedback

2Reliability

If conservative design margins are added to account for uncertainty in circuit models, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveoperation correctnessVSAvoiddesign margin
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent enables the circuit to self-monitor and self-adjust its operating parameters. Error detection modules automatically assess actual performance margins and trigger voltage or frequency adjustments without external intervention, allowing the system to maintain reliability through self-regulation rather than requiring complex pre-designed margins

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If voltage or frequency is reduced to minimize power consumption, then power efficiency is improved, but reliability deteriorates

Engineering Contradiction:
Improvepower efficiencyVSAvoidoperation correctness
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic adjustment of voltage and frequency based on real-time monitoring of circuit performance. The system can operate at lower voltages/frequencies when margins are sufficient (improving power efficiency) and automatically increase them when approaching error thresholds (maintaining reliability), thus dynamically resolving the contradiction between power efficiency and reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses feedback from error detection modules to continuously monitor actual circuit performance and adjust operating parameters accordingly. This feedback mechanism ensures that voltage and frequency are reduced only as much as the actual margins allow, preventing reliability deterioration while maximizing power efficiency

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9444497B1Method and apparatus for adaptively tuning an integrated circuit
Publication Date: 2016.09.13 XILINX INC
  • US9444497B1 patent drawing
  • US9444497B1 patent drawing
  • US9444497B1 patent drawing

AI summary

A method and apparatus for adaptively tuning an integrated circuit are disclosed. For example, an integrated circuit (IC) comprises a monitored path comprising circuit elements operating on a clock signal, where a last circuit element of the circuit elements comprises a first flip flop. The IC also comprises a second flip flop operating on an early clock signal, where the early clock signal is phase shifted from the clock signal, and where the second flip flop is coupled to the monitored path prior to the last circuit element. The IC also comprises a transition detection module for detecting when an output from the first flip flop toggles, and an error prediction module to detect a potential error on the monitored path. The IC comprises a controller that is configured to scale a voltage or a frequency of the IC.