Adaptive Image Rendering with Dynamic Time Allocation

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Solution Overview

Problem

In computer graphics, the challenge lies in completing multiple successive rendering stages within a limited time frame to maintain a target frame rate, as variations in scene complexity can cause some rendering stages to exceed their allocated time, leading to incomplete image frames or reduced frame rates.

Innovation Solution

A data processing apparatus and method that includes rendering circuitry, prediction circuitry to assess if the total time for rendering an image frame will exceed the allocated time, and allocation circuitry to adjust the initial rendering stage time allocations for ongoing stages to shorten the overall rendering time, ensuring completion within the frame allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the rendering process completes all successive rendering stages with high quality, then the rendering precision is improved, but the rendering time increases and may exceed the allocated frame time

Engineering Contradiction:
Improverendering precisionVSAvoidrendering time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent implements dynamic time allocation for rendering stages by using prediction circuitry to forecast completion times and allocation circuitry to adjust time budgets in real-time. This transforms the static time allocation into a dynamic system that adapts to actual rendering progress, allowing the system to complete all rendering stages within the frame time budget while maintaining quality by redistributing time resources based on predicted performance.

Inventive Principle:
Principle #15Dynamics

2Productivity

If the rendering process uses fixed initial time allocation for each stage, then the device complexity is reduced, but the productivity decreases when scene complexity varies

Engineering Contradiction:
Improveframe rendering throughputVSAvoidtime allocation control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where prediction circuitry monitors the actual progress of rendering stages and provides feedback to allocation circuitry. This feedback loop enables the system to adjust time allocations dynamically based on predicted completion times, ensuring optimal productivity across varying scene complexities without requiring overly complex manual intervention.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The rendering system performs self-adjustment of time allocations through automated prediction and allocation circuitry. Instead of requiring external intervention or complex manual scheduling, the system autonomously monitors its own rendering progress and reallocates time resources accordingly, enabling the system to serve itself in optimizing its performance.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If a rendering stage takes more time than expected due to scene complexity, then the rendering quality is improved, but the frame rate decreases

Engineering Contradiction:
Improverendering qualityVSAvoidframe rate
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent dynamically adjusts time allocations for subsequent rendering stages based on predicted overruns in current stages. When a stage is predicted to exceed its time budget, the allocation circuitry redistributes time from other stages, ensuring the total rendering time remains within the frame time allocation. This maintains frame rate while preserving overall rendering quality through adaptive resource management.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3879497B1Adaptive image rendering with plural successive rendering stages
Publication Date: 2024.01.10 SONY INTERACTIVE ENTERTAINMENT LLC
  • EP3879497B1 patent drawingFigure 1
  • EP3879497B1 patent drawingFigure 2a~2b
  • EP3879497B1 patent drawingFigure 3

AI summary

A data processing apparatus comprises rendering circuitry to render an image frame by plural successive rendering stages, each rendering stage having a respective initial rendering stage time allocation, prediction circuitry to predict, in dependence upon rendering of at least one rendering stage of the plural successive rendering stages of a given image frame by the rendering circuitry, whether a total time period for rendering the given image frame by the rendering circuitry will exceed an associated image frame rendering time allocation for the given image frame, and allocation circuitry to vary the respective initial rendering stage time allocation for one or more rendering stages which are not yet completed in respect of the given image frame responsive to the prediction circuity, so as to shorten the total time period for rendering the given image frame by the rendering circuitry.