Adaptive ISPP Voltage Control for Flash Memory Programming
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Solution Overview
Problem
Current flash memory technologies face limitations in achieving improved storage capacity, speed, and reliability, necessitating enhanced programming methods to optimize performance.
Innovation Solution
The proposed solution involves a method of programming nonvolatile memory devices using incremental step pulse programming (ISPP) with adaptive voltage increments based on program conditions, incorporating a control logic unit to determine the program voltage magnitude and applying verification voltages to optimize the number of program loops, and employing a hopping method or normal ISPP based on program loop satisfaction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional incremental step pulse programming (ISPP) method is used, then programming reliability is maintained, but programming speed is limited due to fixed voltage increments requiring many program loops
Solution Approach 1:
The patent applies dynamics by making the program voltage increment adaptive rather than fixed. The control logic unit dynamically adjusts the increment size based on the current program loop count and verification results, transitioning from small increments initially to larger increments later in the programming process. This dynamic adjustment optimizes both speed and reliability by using conservative increments when needed and aggressive increments when safe
Solution Approach 2:
The patent changes the parameter of voltage increment size based on program loop progression. Instead of using a constant increment value, the system modifies the increment parameter adaptively - using smaller increments in early loops for precision and larger increments in later loops for speed. This parameter change resolves the contradiction by allowing the system to balance reliability and speed across different stages of programming
2Productivity
If fixed voltage increment ISPP method is used, then programming process is simple, but programming efficiency is reduced due to inability to adapt to different program conditions
Solution Approach 1:
The patent implements feedback by having the control logic unit continuously monitor verification results and program loop counts, then use this information to adjust subsequent voltage increments. The verification outcome feeds back into the control logic, which modifies the increment strategy for the next program loop. This feedback mechanism enables adaptive optimization of programming efficiency while managing complexity through systematic decision-making
Solution Approach 2:
The control logic unit performs self-service by autonomously determining the optimal voltage increment based on program conditions without external intervention. The system automatically adjusts increment sizes according to verification results and loop progression, enabling it to optimize its own programming process. This self-service capability improves efficiency while containing complexity within the control unit
Data Source
AI summary
A nonvolatile memory device is programmed by performing a plurality of program loops each comprising applying a program voltage to a selected wordline to change a threshold voltage of a selected memory cell, and applying a verification voltage to the selected wordline to verify a program state of the selected memory cell. In each program loop, the nonvolatile memory device determines a program condition and increments the program voltage by an amount determined according to the program condition.