Adaptive Shield Plate Biasing in LDFETs for Breakdown-Resistance Tradeoff
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Solution Overview
Problem
Semiconductor power devices face a trade-off between breakdown voltage and on-state resistance, where increasing breakdown voltage leads to higher on-resistance, making it challenging to design devices that can efficiently handle high currents and voltages while minimizing power consumption.
Innovation Solution
The use of an adaptively biased shield plate in LDFET transistors, which adjusts the threshold voltage and dopant concentration based on the device's state, allowing for independent control of breakdown voltage and on-state resistance, thereby reducing on-resistance while maintaining high breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the breakdown voltage of a semiconductor power device is increased, then the device can withstand higher voltages, but the on-state resistance increases leading to higher power consumption
Solution Approach 1:
The device is segmented into multiple regions with different doping concentrations - a lightly-doped drain (LDD) region and a heavily-doped region. This segmentation allows the LDD region to provide high breakdown voltage while the heavily-doped region maintains low on-state resistance, resolving the contradiction between voltage withstand capability and power consumption.
Solution Approach 2:
Different regions of the device are assigned different local properties - the LDD region has low doping concentration for high voltage tolerance, while the region near the source contact has high doping concentration for low resistance. This local quality differentiation enables simultaneous optimization of both breakdown voltage and on-state resistance.
2Reliability
If a shield plate is added to block large current and voltage signals, then the gate-to-drain capacitance is lowered and LDD is protected, but the device structure becomes more complex
Solution Approach 1:
The shield plate is designed to perform multiple functions simultaneously: it blocks large voltage signals from reaching the LDD region, reduces gate-to-drain capacitance, and provides a pathway for controlled carrier flow. By consolidating these functions into a single structure, the patent minimizes added complexity while achieving multiple protective and performance-enhancing effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables LDFETs to handle high voltages and currents with lower on-state resistance, improving the overall performance and fidelity of differential-pair amplifiers by adjusting the shield plate bias voltage, thus enhancing the device's ability to switch between on and off states effectively.
Implementation Method 1
The shield plate blocks the LDD region and the gate from large current and voltage signals that are applied to the drain contact of the device. As such, the shield plate lowers the gate-to-drain capacitance of the LDFET structure.
Implementation Method 2
A control circuit is electrically coupled to the first electrically conductive shield plate and configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
Data Source
AI summary
An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.