Adaptive LDPC Decoder Modes for Lower-Power ECC Correction
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Solution Overview
Problem
Existing ECC decoding methods in storage devices require repeated stages of decoding, which can lead to increased power consumption and reduced reliability when one stage fails to correct errors.
Innovation Solution
The implementation of an ECC circuit with a low-density parity-check (LDPC) decoder that adjusts its operation mode based on the variable node degree and error metric of each column, performing sequential decoding in varying power modes to optimize error correction while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeated stages of ECC decoding are performed to improve reliability, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the decoding operation mode adjustable and adaptable. The LDPC decoder dynamically selects between first operation mode (higher power, higher correction capability) and second operation mode (lower power, standard correction capability) based on the syndrome vector results from previous decoding stages, allowing the system to adapt its power consumption and correction capability to the actual error conditions.
Solution Approach 2:
The patent changes operational parameters by varying the operation mode for different columns during sequential decoding. The controller modifies decoding parameters such as message exchange between check nodes and variable nodes based on the syndrome vector weight, enabling the system to adjust its correction capability and power consumption by changing these operational parameters rather than maintaining a fixed high-power mode.
2Device complexity
If standard ECC decoding is performed on all columns, then decoding simplicity is maintained, but power consumption increases
Solution Approach 1:
The patent applies local quality by treating different columns of the parity-check matrix differently based on their specific characteristics. Instead of applying the same decoding operation mode to all columns, the system determines the operation mode for each column based on the syndrome vector and column properties, allowing standard decoding for some columns while applying enhanced decoding only where needed, thus reducing overall power consumption.
Solution Approach 2:
The patent segments the decoding process into different operation modes applied to different columns. The sequential decoding approach divides the codeword into multiple columns that are decoded independently with different operation modes selected based on syndrome vector analysis, allowing the system to segment power consumption according to actual error distribution rather than applying uniform high-power decoding to all columns.
3Use of energy by moving object
If adaptive operation modes are set for each column, then power consumption is reduced, but decoding complexity increases
Solution Approach 1:
The patent implements feedback by using the syndrome vector results from previous decoding iterations to inform subsequent decoding decisions. The syndrome vector weight calculation provides feedback about the current error state, which the controller uses to determine appropriate operation modes for subsequent column decoding, creating a feedback loop that guides adaptive power management without requiring complex external control logic.
Solution Approach 2:
The patent applies self-service by enabling the LDPC decoder to automatically determine and adjust its own operation mode based on syndrome vector analysis. The decoder performs self-assessment of the error condition through syndrome calculation and autonomously selects the appropriate decoding strategy, reducing the need for external control complexity while achieving adaptive power consumption management.
Data Source
AI summary
An example operating method of an error correction code (ECC) circuit includes receiving a codeword from a memory device, calculating a syndrome vector based on the codeword and a parity-check matrix indicating whether messages are exchanged between check nodes and variable nodes, performing, when the syndrome vector is not a zero vector, sequential decoding on a plurality of columns of the parity-check matrix by decoding a first column in a first operation mode, the first column having a first variable node degree, decoding a second column in a second operation mode, the second column having a second variable node degree, and decoding a third column in a third operation mode, the third column having a third variable node degree, and calculating the syndrome vector whenever the sequential decoding of the plurality of columns is completed and iteratively performing the sequential decoding until the syndrome vector is the zero vector.