Adaptive Load-Line Matching Circuit for Low-Loss Power Amplifiers
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Solution Overview
Problem
Power amplifiers suffer from low efficiency at medium output power levels due to load-line optimization for maximum output power, and existing matching networks experience excessive insertion losses and efficiency degradation at high output power due to large impedance transformation ratios.
Innovation Solution
An adaptive load-line matching network is implemented, comprising a variable impedance matching network and a fixed impedance inverting network, where the variable network includes switchable capacitors and inductors in MEMS technology, controlled by a digital code to adjust impedance settings based on output power levels, and a control circuit using a look-up table for optimal matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a fixed matching network optimized for maximum output power is used, then maximum output power efficiency is improved, but medium output power efficiency deteriorates
Solution Approach 1:
The patent implements a variable matching network that dynamically adjusts the load-line impedance based on the power amplifier's output power level. Switchable capacitors and inductors allow the network to transition between different impedance configurations, optimizing efficiency across medium and maximum power levels rather than being fixed for only maximum power.
Solution Approach 2:
The matching network changes its electrical parameters (impedance values) by switching capacitors and inductors in and out of the circuit. This allows the load-line impedance to be adapted according to the operating power level, resolving the contradiction between fixed optimization and adaptive versatility.
2Ease of operation
If a variable matching network with large impedance transformation ratio is used, then medium output power matching is improved, but insertion loss increases at high output power
Solution Approach 1:
The matching network is divided into multiple switchable capacitor and inductor elements that can be independently configured. This segmentation allows the network to achieve impedance transformation through multiple smaller steps rather than one large transformation, reducing insertion loss while maintaining matching capability across different power levels.
Solution Approach 2:
The network dynamically reconfigures its impedance transformation ratio based on the operating power level. At high power levels, the network uses configurations with smaller transformation ratios to minimize insertion loss, while at medium power levels it employs larger transformation ratios for optimal matching.
3Reliability
If fixed LC-resonance circuits are used for harmonic rejection, then harmonic rejection is improved, but load-line tuning at fundamental frequency becomes limited
Solution Approach 1:
The circuit separates the functions of harmonic rejection and load-line tuning by using fixed LC-resonance circuits for harmonic frequencies and variable switchable components for fundamental frequency load-line adjustment. This segmentation allows both functions to operate independently without compromising either harmonic rejection or load-line tuning versatility.
Solution Approach 2:
Different parts of the circuit have specialized functions: fixed LC-resonance circuits are placed at harmonic frequency points to provide local harmonic rejection, while the variable matching network handles fundamental frequency load-line tuning. Each component is optimized for its specific function, resolving the contradiction between fixed harmonic rejection and variable load-line tuning.
Data Source
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AI summary
According to the general concept disclosed herein a circuit for adaptive matching of a load impedance (z load) to a predetermined load-line impedance of a load-line connected to a power amplifier (300) output comprises a fixed matching network (201) between the power transistor and an adaptive matching network (101), whereby the fixed matching network acts as an impedance inverter which results in a relatively low insertion loss at high power. Results indicate that the impedance-inverting network can be used over more than a factor of 10 in impedance variation. Further, the usage of the fixed matching network, close to the power transistor, allows for the implementation of transmission zeros and/or for a well defined load impedance at a predetermined harmonic frequency, independent of the (variable) load impedance at the fundamental frequency.