Adaptive Memory Assistance Circuitry for Runtime Pattern Optimization

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Solution Overview

Problem

Existing integrated circuit systems lack adaptive memory solutions, requiring application developers to understand hardware architecture and use high-level synthesis tools for programmable logic, which limits flexibility and efficiency in memory access operations.

Innovation Solution

Integrated circuit design tools that identify memory access patterns and match them to templates to generate configuration files for programmable memory assistance circuits, allowing dynamic reconfiguration and optimization of memory access operations at runtime.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-level synthesis design flow is used for programmable logic, then application acceleration is enabled, but developers must understand hardware architecture and map entire applications

Engineering Contradiction:
Improveapplication accelerationVSAvoidhardware architecture understanding requirement
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediate tool that automatically translates C/C++ code into hardware description language and generates configuration data for memory assistance circuits. This intermediary tool shields developers from hardware architecture complexity while enabling application acceleration through programmable logic.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables self-service by allowing standard C/C++ code to automatically generate the necessary hardware configuration without requiring developers to manually map applications or understand hardware architecture. The toolchain handles the entire transformation process autonomously.

Inventive Principle:
Principle #25Self-service

2Reliability

If fixed memory architecture is used, then system stability is maintained, but adaptability to different memory access patterns is limited

Engineering Contradiction:
Improvesystem stabilityVSAvoidmemory access pattern adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic memory assistance circuits that can be reconfigured at runtime based on detected memory access patterns. The system transitions from a static memory architecture to a dynamic one where assistance circuits adapt their behavior to match the specific access patterns of running applications, thereby maintaining stability while enhancing adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by detecting memory access patterns and automatically adjusting the configuration of memory assistance circuits. This includes modifying circuit behavior, timing parameters, and resource allocation dynamically to optimize performance for different access patterns while maintaining system stability.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If programmable memory assistance circuits are added, then memory access performance is improved, but device complexity increases

Engineering Contradiction:
Improvememory access performanceVSAvoidcircuit configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the complexity of memory assistance circuit configuration from the main system by using separate, automatically generated configuration data files. The complexity is isolated in the toolchain that generates these files from standard C/C++ code, keeping the core system simple while enabling performance improvements through programmable circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11500674B2Circuitry with adaptive memory assistance capabilities
Publication Date: 2022.11.15 INTEL CORP
  • US11500674B2 patent drawing
  • US11500674B2 patent drawing
  • US11500674B2 patent drawing

AI summary

A system for running one or more applications is provided. Each application may require memory services that can be accelerated using configurable memory assistance circuits associated with different levels of a memory hierarchy. Integrated circuit design tools may be used to generate configuration data for programming the configurable memory assistance circuits. During compile time, the design tools may identify memory service patterns in a source code, match the identified memory service patterns to corresponding templates, parameterize the matching templates, and then synthesize the parameterized templates to produce the configuration data. During run time, a memory assistance scheduler may map the memory services required by each application to available memory assistance circuits in the system. The mapped memory assistance circuits are programmed by the configuration data to provide the desired memory service capability.