Adaptive Memory Bandwidth Compression in CPU Systems

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Solution Overview

Problem

Current memory bandwidth compression schemes in CPU-based systems face limitations in achieving high compression ratios while minimizing memory bandwidth consumption, leading to increased latency due to queued memory access requests when external memory bandwidth is reached.

Innovation Solution

An adaptive memory bandwidth compression system using a compressed memory controller (CMC) that employs two compression mechanisms: one for small data amounts and another for larger data groups, determining the best compression method based on the size of the results to store either separately or together in system memory, with a master table for tracking compression data and a prefetch accuracy indicator for optimizing data retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory bandwidth compression schemes are employed to reduce bandwidth consumption, then memory bandwidth efficiency is improved, but memory access latency increases due to queued requests

Engineering Contradiction:
Improvememory bandwidth consumptionVSAvoidmemory access latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent implements dynamic compression ratio adjustment based on data characteristics and memory controller status. The compression ratio is not fixed but adapts in real-time to optimize between bandwidth savings and access latency, allowing the system to respond to changing workload conditions and memory queue states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes multiple parameters including compression algorithm selection, compression ratio, and memory line size based on workload characteristics. By dynamically adjusting these parameters, the system optimizes the trade-off between compression efficiency and access performance for different data patterns and memory conditions

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If memory line size is increased to achieve higher compression ratios, then compression efficiency is improved, but wasted memory bandwidth increases

Engineering Contradiction:
Improvecompression ratioVSAvoidwasted memory bandwidth
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent segments memory lines into smaller units that can be independently compressed and transferred. This allows the system to apply compression to only the necessary data portions rather than entire memory lines, reducing wasted bandwidth while maintaining compression efficiency through selective processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies partial compression actions by compressing only the portions of memory data that benefit from compression rather than processing entire memory lines uniformly. This partial action approach avoids the bandwidth waste associated with compressing or transferring unnecessary data

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If conventional compression schemes are used, then implementation simplicity is maintained, but compression ratio and bandwidth efficiency are limited

Engineering Contradiction:
Improvecompression scheme complexityVSAvoidbandwidth efficiency
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The patent implements a universal compression architecture that can handle multiple data types, compression ratios, and memory access patterns through a single integrated system. The memory controller is designed to perform multiple functions including compression, decompression, and adaptive parameter adjustment, improving bandwidth efficiency without requiring separate specialized systems

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10176090B2Providing memory bandwidth compression using adaptive compression in central processing unit (CPU)-based systems
Publication Date: 2019.01.08 QUALCOMM INC
  • US10176090B2 patent drawing
  • US10176090B2 patent drawing
  • US10176090B2 patent drawing

AI summary

Providing memory bandwidth compression using adaptive compression in central processing unit (CPU)-based systems is disclosed. In one aspect, a compressed memory controller (CMC) is configured to implement two compression mechanisms: a first compression mechanism for compressing small amounts of data (e.g., a single memory line), and a second compression mechanism for compressing large amounts of data (e.g., multiple associated memory lines). When performing a memory write operation using write data that includes multiple associated memory lines, the CMC compresses each of the memory lines separately using the first compression mechanism, and also compresses the memory lines together using the second compression mechanism. If the result of the second compression is smaller than the result of the first compression, the CMC stores the second compression result in the system memory. Otherwise, the first compression result is stored.