Adaptive Memory Clock Tuning via Multi-Parameter Control

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Solution Overview

Problem

Existing memory devices face performance and power consumption issues due to fixed clock rates based on a single parameter like workload, leading to latency and inflexibility in adapting to changing system environments.

Innovation Solution

Implementing a system where clock rates are dynamically adjusted based on multiple system parameters, such as bit error rate, program-erase cycles, and temperature, using a controller with an adaptive frequency table to optimize performance and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If clock rates are fixed based on a single parameter (workload), then device complexity is reduced, but adaptability to different system environments deteriorates

Engineering Contradiction:
Improveclock rate control complexityVSAvoidadaptability to system environments
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic clock rate adjustment by transitioning from fixed clock rates to variable clock rates that adapt to changing system conditions. The controller continuously monitors multiple parameters (temperature, voltage, workload) and dynamically adjusts clock rates accordingly, making the system flexible and adaptive to different operating environments.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the memory device by introducing multi-parameter-based clock rate adjustment. Instead of using a single workload parameter, the system now considers temperature, voltage, and workload simultaneously to determine optimal clock rates, thereby improving adaptability without significantly increasing complexity.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If clock rates are reduced, then power consumption is reduced, but system performance deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system dynamically adjusts clock rates based on real-time monitoring of temperature, voltage, and workload conditions. When conditions permit higher performance, the clock rate increases to maximize productivity. When conditions require power savings or thermal management, the clock rate decreases accordingly, optimizing the balance between power consumption and performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter-based clock rate adjustment where the clock frequency is changed according to multiple system parameters including temperature, voltage, and workload. This allows the system to achieve power savings during low-demand or high-temperature conditions while maintaining high performance when conditions are favorable.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If clock rates are increased, then system performance is improved, but peak power consumption increases

Engineering Contradiction:
Improvesystem performanceVSAvoidpeak power consumption
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The controller continuously monitors system conditions and dynamically adjusts clock rates to optimize performance while managing power consumption. During peak workload conditions, the system can sustain higher clock rates for improved performance. During non-peak conditions, the clock rate is reduced to lower power consumption, thereby avoiding excessive peak power demands.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If clock rates are based on multiple parameters, then adaptability to system environments is improved, but device complexity increases

Engineering Contradiction:
Improveadaptability to system environmentsVSAvoidclock rate control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The controller is designed to perform multiple functions: monitoring temperature, measuring voltage, assessing workload, and adjusting clock rates based on the combined information from these sources. This multi-functional approach allows the system to achieve high adaptability through a single integrated control mechanism rather than separate control systems for each parameter.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12112048B2Adaptive tuning of memory device clock rates based on dynamic parameters
Publication Date: 2024.10.08 SANDISK TECHNOLOGIES LLC
  • US12112048B2 patent drawing
  • US12112048B2 patent drawing
  • US12112048B2 patent drawing

AI summary

The present disclosure generally relates to improving adaptive tuning of different clock rates of a memory device. Rather than clock rates only being determined off of one parameter such as workload, the clock rates now will be determined using multiple parameters. The tuning may be based on system parameters to allow the system to withstand challenges that arise during the operation. The clock frequency table is maintained in the device controller. The table holds the clock frequency of each component. The disclosure proposes modifying the table according to different system environment parameters to maintain performance or reduce power consumption. Adaptive tuning allows a more flexible system design that can adapt according to the current system status. Adaptive tuning also reduces peak power consumption, improves performance, and better quality of service (QoS) compatibility characteristics.