Adaptive Memory Command Timers for Variable Completion Times

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Solution Overview

Problem

Existing memory subsystems use uniform, worst-case command completion timers that lead to performance bottlenecks and increased manufacturing costs due to discarding memory components with varying completion times.

Innovation Solution

Implementing dynamic, tunable command completion timers per subdivision of memory, based on memory component design, manufacturing characterization, and run-time testing, allowing for faster components to operate at higher speeds while maintaining reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform, worst-case command completion timers are used, then reliability is maintained, but productivity deteriorates due to performance bottlenecks

Engineering Contradiction:
Improvecommand completion reliabilityVSAvoidmemory operation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic command completion timers that adapt to actual memory operation speeds. Instead of using fixed worst-case timers, the system continuously monitors command completion times and adjusts timer values accordingly, allowing faster memory operations to complete without artificial delays while maintaining reliability through adaptive threshold adjustments.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the timer parameter from a static worst-case value to a dynamic value that reflects actual memory performance characteristics. By characterizing memory components during manufacturing and updating timer values based on run-time testing, the system optimizes the balance between reliability and productivity by using parameter values matched to actual component performance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If uniform, worst-case command completion timers are used, then reliability is maintained, but manufacturing costs increase due to discarding memory components with varying completion times

Engineering Contradiction:
Improvecommand completion reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by characterizing individual memory components during manufacturing to determine their specific command completion times. Instead of treating all memory components uniformly with worst-case timers, the system assigns component-specific timer values based on their actual performance characteristics, allowing faster components to be utilized rather than discarded.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system incorporates feedback from manufacturing characterization and run-time testing to continuously refine timer values. By monitoring actual command completion times and comparing them against expected values, the system adjusts timer parameters to match actual memory component performance, reducing the need to discard components that don't meet arbitrary worst-case specifications.

Inventive Principle:
Principle #23Feedback

3Productivity

If dynamic, tunable command completion timers per subdivision of memory are implemented, then productivity is improved by allowing faster components to operate at higher speeds, but device complexity increases

Engineering Contradiction:
Improvememory operation speedVSAvoidtimer management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the memory system into distinct subdivisions (such as banks or channels) and implements separate command completion timers for each subdivision. This allows independent optimization of timer values for each segment based on its specific performance characteristics, improving overall productivity without requiring complex global timer management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements self-service by automatically characterizing memory components during manufacturing and continuously monitoring run-time performance to adjust timer values without external intervention. The memory subsystem autonomously optimizes its own timer parameters based on observed performance, reducing the complexity of external timer management while maintaining high productivity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250238168A1Adaptive Command Completion Timers
Publication Date: 2025.07.24 MICRON TECHNOLOGY INC
  • US20250238168A1 patent drawing
  • US20250238168A1 patent drawing
  • US20250238168A1 patent drawing

AI summary

Exemplary methods, apparatuses, and systems include receiving a request to perform an operation in memory. A subdivision of the memory to which the request is directed is determined. A command completion time based upon a command type for the operation and which subdivision of the memory to which the request is directed is determined. A command is sent to the memory for the operation. A request is sent to the memory for a status of the command based upon the determined command completion time.