Adaptive Memory Decoder for Page-Type and Life-Cycle Errors

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Solution Overview

Problem

Current memory systems face challenges in improving error correction performance and reducing decoding latency, particularly in portable electronic devices where data is stored across various types of pages with different life cycles, leading to varying fail-bit distributions and raw bit error rates.

Innovation Solution

A memory system with a decoder that adapts by selecting optimal parameters based on the type of page and the current life cycle state of the memory device, utilizing a low density parity check (LDPC) code to enhance error correction and reduce decoding latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed decoding parameter is used for all pages, then the device complexity is reduced, but the error correction performance deteriorates due to varying fail-bit distributions across different page types and life cycle stages

Engineering Contradiction:
Improveerror correction performanceVSAvoiddecoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoder dynamically adjusts decoding parameters based on the detected page type and memory device life cycle stage. The controller selects different decoding parameters from a set of predefined parameters corresponding to different page types (e.g., SLC, MLC, TLC) and life cycle stages, allowing the decoding process to adapt to varying error characteristics without requiring multiple dedicated decoders.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes decoding parameters such as threshold values, iteration counts, or algorithm configurations based on the detected page type and life cycle information. By modifying these parameters according to the specific decoding context, the system optimizes error correction performance for each scenario while using a single decoder hardware structure.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If decoding parameters are optimized for each page type and life cycle stage, then error correction performance is improved, but decoding latency increases due to parameter selection overhead

Engineering Contradiction:
Improveerror correction performanceVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system pre-establishes multiple sets of decoding parameters corresponding to different page types and life cycle stages before actual decoding operations. When a decoding operation is needed, the controller quickly identifies the appropriate parameter set based on page type and life cycle information, avoiding real-time parameter optimization and reducing latency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system creates copies of decoding parameter sets for different page types and life cycle stages, allowing the decoder to directly select and use the appropriate pre-configured parameters without performing complex real-time analysis or optimization, thereby minimizing the time added by parameter adaptation.

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If multiple decoding parameter sets are maintained for different page types, then adaptability is improved, but the device complexity increases due to additional storage and selection mechanisms

Engineering Contradiction:
Improvedecoder adaptabilityVSAvoidparameter management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system segments the decoding parameter space into distinct sets corresponding to different page types (SLC, MLC, TLC) and life cycle stages. Each segment is independently managed and selected based on the detected decoding context, allowing the system to maintain multiple specialized parameter sets without requiring a single complex adaptive mechanism.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller acts as an intermediary between the multiple decoding parameter sets and the decoder. It detects the page type and life cycle stage, selects the appropriate parameter set, and provides it to the decoder, thereby managing the complexity of having multiple parameter sets without burdening the decoder hardware itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If a single decoding parameter is used across all memory pages, then ease of operation is maintained, but productivity decreases due to repeated decoding iterations needed for different page types

Engineering Contradiction:
Improvedecoding efficiencyVSAvoiddecoder operation simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The decoder operation becomes dynamic by automatically adjusting parameters based on page type and life cycle stage detection. This dynamic adaptation reduces the number of decoding iterations needed for different page types, improving overall productivity while maintaining ease of operation through automated parameter selection without user intervention.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses feedback from page type detection and life cycle stage information to automatically select appropriate decoding parameters. This feedback mechanism allows the decoder to adapt its behavior based on the specific decoding context, improving efficiency by avoiding unnecessary iterations while keeping the operation simple through automated control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11036579B2Decoder for memory system and method thereof
Publication Date: 2021.06.15 SK HYNIX INC
  • US11036579B2 patent drawing
  • US11036579B2 patent drawing
  • US11036579B2 patent drawing

AI summary

Decoder is provided for memory systems. The decoder receives data from a memory device including a plurality of pages, each storing data, and decoding the data based on a type of a page in which the data is stored, among the plurality of pages and life cycle information indicating a current state of the memory device in its life cycle.