Adaptive Memory ECC System for Variable Data Lengths
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Solution Overview
Problem
Conventional memory systems with error correction functions face challenges in accommodating varying data lengths, particularly in modes like Burst Chop, X4, X8, and X16, leading to increased memory array area and cost, reduced flexibility in ECC algorithm selection, and inefficiencies in data processing.
Innovation Solution
A memory system comprising a data array, ECC array, ECC encoding and decoding modules, and data selection modules that dynamically adjust data length through control signals to ensure compatibility with different data lengths and ECC algorithms, maintaining operational efficiency and flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a minimum data length of 8 is used to support all modes, then all memory modes can be supported, but at least 4-bit parity bits are required which increases memory array area by at least 50%
Solution Approach 1:
The patent applies dynamics by making the data length adaptive rather than fixed. The memory system dynamically adjusts the data length based on the operating mode (X4, X8, X16, Burst Chop) through control signals. This allows the ECC encoding module to receive exactly the required data length for each mode, avoiding the need to always use minimum data length of 8 and thereby reducing the required parity bits and memory array area.
Solution Approach 2:
The patent changes the parameter of data length from a fixed minimum value to a variable parameter that adapts to different operating modes. By receiving control signals indicating the current mode, the system adjusts the data length parameter accordingly (e.g., 4 bits for X4 mode, 8 bits for X8 mode), which directly reduces the number of parity bits needed and thus the memory array area required for storing ECC information.
2Device complexity
If data length is fixed for ECC encoding, then ECC algorithm selection is simplified, but flexibility in supporting different memory modes is reduced
Solution Approach 1:
The patent implements universality by designing the ECC encoding module to handle multiple data lengths through a single unified structure. The module receives control signals that indicate the current operating mode and adjusts its operation accordingly. This multi-functional design allows the same ECC encoding module to support X4, X8, X16, and Burst Chop modes without requiring separate encoding modules for each mode, thus maintaining simplicity while achieving flexibility.
Solution Approach 2:
The system dynamically adapts the data length input to the ECC encoding module based on the operating mode. Control signals convey mode information to the encoding module, which then configures itself to process the appropriate data length. This dynamic adjustment maintains operational simplicity for each specific mode while providing flexibility across multiple modes.
3Adaptability or versatility
If parity bits are increased to support variable data lengths, then all modes can be supported, but power dissipation increases
Solution Approach 1:
The patent changes the parameter of parity bit length from a fixed maximum value to a variable parameter that matches the actual data length being processed. By adjusting the data length parameter based on the operating mode, the system generates the minimum necessary parity bits for each mode (e.g., fewer parity bits for X4 mode with 4-bit data), thereby reducing the power dissipation associated with generating and storing additional parity bits.
Data Source
AI summary
The present invention relates to a memory with error correction function, comprising a data array, an ECC array, an ECC encoding module, an ECC decoding module, a first data selection module, a second data selection module and a data output module; wherein when data is being written, the first data selection module receives the data to be written, and determines whether to receive the data from the data array in response to a control signal that affects the length of the data; when data is being read, the second data selection module controls the length of the data output from the data output module in response to the control signal that affects the length of the data. The invention further relates to a method of correcting errors in a memory.