Adaptive Memory Read Commands for Sequential and Random Access

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory systems do not efficiently account for the ratio of random-to-sequential data, leading to reduced performance and throughput in read operations, particularly when dealing with a high proportion of randomly-written data.

Innovation Solution

A memory system dynamically determines command types based on the ratio of random-to-sequential data and adjusts data transfer units to optimize performance, using counters or trackers to identify sequential addresses and adjust data transfer sizes accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory systems use traditional read commands without considering data randomness, then device complexity is low, but data throughput and performance deteriorate

Engineering Contradiction:
Improvedata throughputVSAvoidcommand determination complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system performs preliminary analysis of the read command queue to identify sequential address patterns before executing read operations. By pre-determining whether data is sequentially or randomly written, the system can select appropriate read command types in advance, optimizing performance without adding complex real-time decision-making mechanisms during data transfer

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the type of read command issued based on the detected data pattern (sequential vs. random). Instead of using a fixed command type, the memory system adapts its command selection to match the actual data characteristics, thereby improving throughput while maintaining manageable complexity through conditional logic

Inventive Principle:
Principle #15Dynamics

2Productivity

If memory systems issue read commands without adjusting for data patterns, then operation simplicity is maintained, but IOPS and latency performance worsen

Engineering Contradiction:
ImproveIOPSVSAvoidcommand issuance complexity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The memory system implements a feedback mechanism that monitors the characteristics of data in the read command queue and uses this information to adjust subsequent command issuance. By tracking address patterns and determining sequentiality, the system provides feedback to the command generation logic, enabling adaptive command selection that improves IOPS while automating the complexity of pattern recognition

Inventive Principle:
Principle #23Feedback

3Productivity

If memory systems process all read commands uniformly, then processing consistency is maintained, but performance on random data deteriorates

Engineering Contradiction:
Improveread operation performanceVSAvoiddata pattern adaptability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The memory system applies different read command types to different portions of the read command queue based on local data characteristics. Instead of treating all commands uniformly, the system identifies sequential address patterns in specific regions and applies optimized read commands only to those regions, while using standard commands for random data portions, thereby improving overall performance through localized optimization

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250284403A1Sequential and random read operations in memory systems
Publication Date: 2025.09.11 MICRON TECHNOLOGY INC
  • US20250284403A1 patent drawing
  • US20250284403A1 patent drawing
  • US20250284403A1 patent drawing

AI summary

Methods, systems, and devices for sequential and random read operations in memory systems are described. A memory system may generate memory system commands based on whether a read command from a host system is associated with a sequential address or non-sequential address. The memory system may include a counter that increments based on receiving a sequential read command and may output different command types based on a value of the counter. Additionally, or alternatively, a memory system may adjust a size of a data transfer unit based on a size of a generated command as well as a remaining size of the data transfer unit. The memory system may combine data associated with multiple read commands into a single data transfer unit based on the size of the generated read command satisfying a threshold and the remaining size of the data transfer unit satisfying a threshold.