Memory Device Self-Referenced Reads with Adaptive Voltage Ramping
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Solution Overview
Problem
Existing memory devices face inefficiencies in read techniques for threshold-type memories, particularly in activating memory cells at varying distances from drivers, leading to suboptimal performance and energy consumption.
Innovation Solution
Adaptive read techniques are employed, utilizing a staircase-shaped voltage ramp with statistically derived optimal start voltage, step duration, and number of steps, adjusted based on the distribution of memory cell threshold voltages, to efficiently activate memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fixed voltage levels are used to activate memory cells at various distances from drivers, then the memory device can operate with simple control logic, but memory cells at different distances cannot be activated efficiently leading to suboptimal read performance
Solution Approach 1:
The patent applies dynamics by transitioning from fixed voltage levels to dynamic voltage ramping. The read operation uses a staircase-shaped voltage ramp that adapts its progression based on real-time detection of memory cell activation states. This allows the system to optimize voltage application for cells at different distances from drivers during the same read operation, thereby improving read performance without requiring separate control logic for different cell locations.
Solution Approach 2:
The patent implements feedback mechanisms where the read operation continuously monitors the state of memory cells during voltage ramping. Based on this feedback about which cells are activated at each voltage threshold, the system adjusts subsequent voltage steps dynamically. This feedback-driven adaptation enables efficient activation of cells at varying distances while maintaining unified control logic.
2Reliability
If multiple fixed voltage steps are used to ensure all memory cells are activated, then read completeness is improved, but energy consumption increases due to unnecessary voltage application
Solution Approach 1:
The system uses feedback from monitoring memory cell activation states to dynamically adjust voltage ramping. When cells at lower voltage thresholds are activated, the system detects this and modifies subsequent voltage steps accordingly. This prevents unnecessary high voltage application to cells that have already been activated at lower thresholds, thereby reducing energy consumption while maintaining read completeness through adaptive voltage progression.
Solution Approach 2:
The patent applies parameter changes by making voltage levels dynamic rather than fixed. The staircase-shaped voltage ramp adjusts its parameters (voltage magnitude, step size, duration) based on the distribution of memory cell threshold voltages and real-time activation detection. This adaptive parameter adjustment ensures sufficient voltage is applied only when necessary to activate remaining cells, optimizing the balance between read completeness and energy efficiency.
3Productivity
If uniform read timing is applied to all memory cells, then control simplicity is maintained, but read efficiency decreases due to varying activation times of cells at different distances
Solution Approach 1:
The patent implements dynamic timing control where the read operation adapts its timing parameters based on detected memory cell activation patterns. The staircase-shaped voltage ramp incorporates variable step durations that respond to real-time cell activation states, allowing cells at different distances to be read at their optimal activation moments. This dynamic timing approach improves read efficiency while maintaining manageable control complexity through automated adaptation.
Solution Approach 2:
The read operation performs self-service by automatically adjusting timing based on its own observations of cell activation. The system monitors which cells activate at each voltage threshold and uses this information to self-regulate subsequent timing parameters. This self-adaptive mechanism eliminates the need for external timing control for different cell locations, improving read efficiency without proportionally increasing control complexity.
Data Source
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AI summary
Methods and systems include memory devices (100) with a memory array (112) comprising a plurality of memory cells (102). The memory devices (100) include a control circuit (122) operatively coupled to the memory array (112) and configured to receive a read request for data and to apply a first voltage at a first time duration to the memory array (112) based on the read request. The control circuit (122) is additionally configured to count a number of the plurality of memory cells (102) that have switched to an active read state based on the first voltage and to derive a second time duration. The control circuit (122) is further configured to apply a second voltage at the second duration to the memory array (112). The control circuit (122) is also configured to return the data based at least on bits stored in a first and a second set of the plurality of memory cells (102).