Adaptive Memory Scan Frequency Control

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Solution Overview

Problem

Current memory subsystems utilize a fixed data integrity scan frequency based on worst-case scenarios, leading to unnecessarily high scan rates, which delay memory access and reduce bandwidth, despite varying memory age, endurance, and utilization levels.

Innovation Solution

Implementing an adaptive data integrity scan frequency that dynamically adjusts based on the age and utilization of memory devices, reducing scan frequency during the beginning and middle of a memory device's life and when not fully utilized, thereby optimizing scan intervals without compromising data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed data integrity scan frequency based on worst-case scenarios is used, then data reliability is maintained, but memory access bandwidth is reduced and scan delays increase

Engineering Contradiction:
Improvedata reliabilityVSAvoidmemory access bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic scan frequency adjustment based on memory device characteristics. The controller determines age indicators and endurance indicators for each memory device and adjusts the scan frequency accordingly, transitioning from a static worst-case approach to a dynamic adaptive approach that optimizes both reliability and performance

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the scan frequency parameter based on determined characteristics of memory devices. By calculating age indicators (based on manufacturing dates) and endurance indicators (based on program/erase cycle counts), the system adjusts scan frequency to match actual device conditions rather than using a fixed conservative parameter

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a fixed high scan frequency is used to ensure data integrity, then data reliability is maintained, but scan delays increase and access performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidscan delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically adjusts scan frequency based on real-time characteristics of memory devices. By determining age indicators and endurance indicators, the controller adapts scan intervals to match actual device reliability needs, reducing unnecessary scans for younger, more reliable devices while maintaining high scan frequencies for older or degraded devices

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The scan frequency parameter is changed based on determined device characteristics. The controller calculates appropriate scan intervals by considering age indicators (time since manufacturing) and endurance indicators (program/erase cycle counts), adjusting the time parameter to optimize between data integrity and access performance

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11467897B1Adaptive data integrity scan frequency
Publication Date: 2022.10.11 MICRON TECHNOLOGY INC
  • US11467897B1 patent drawing
  • US11467897B1 patent drawing
  • US11467897B1 patent drawing

AI summary

Exemplary methods, apparatuses, and systems include detecting a trigger to update a data integrity scan frequency. In response to detecting the trigger, an age indicator for a subdivision of memory or a utilization value for the subdivision of memory are obtained. A new data integrity scan frequency is determined using the age indicator or the utilization value. A scan of the subdivision of memory is initiated during a current media scan loop using the new data integrity scan frequency.