Adaptive Memory Programming via Variable Data Segmentation

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Solution Overview

Problem

Existing nonvolatile memory (NVM) devices face inefficiencies in programming time due to constraints that require partitioning data into fixed length segments, leading to prolonged programming times, especially when a whole row cannot be programmed simultaneously.

Innovation Solution

The implementation of adaptive programming methods that partition words into variable length segments, where the size of the segments depends on the specific data values and constraints of the memory circuit, allowing for efficient writing of data in memory cells one segment at a time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is partitioned into fixed length segments for programming, then the programming process becomes manageable under circuit constraints, but the programming time increases

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies segmentation by dividing the data word into multiple segments that can be programmed in parallel across different memory rows. Instead of programming one fixed-length segment at a time sequentially, the invention segments the data such that multiple segments are distributed across multiple rows and programmed simultaneously, thereby reducing total programming time while respecting circuit constraints.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic segmentation where the length and distribution of segments are not fixed but adapt based on the specific data pattern and memory circuit constraints. The segmentation strategy dynamically adjusts to optimize parallel programming efficiency, allowing variable segment lengths and distributions depending on the programming context, thus improving productivity without being bound by rigid fixed-length limitations.

Inventive Principle:
Principle #15Dynamics

2Reliability

If a whole row cannot be programmed at the same time due to circuit constraints, then the programming process must be partitioned, but this leads to prolonged programming times

Engineering Contradiction:
Improveconstraint complianceVSAvoidprogramming efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent resolves this contradiction by segmenting the data word into multiple smaller segments that can be programmed in parallel across different memory rows. This segmentation allows the system to work within circuit constraints (not overloading a single row) while maintaining high productivity through parallel programming operations. Multiple segments are distributed and programmed simultaneously across available rows, maximizing resource utilization without violating circuit limitations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional sequential programming approach (programming one segment at a time in a single row) to a multi-dimensional parallel approach by distributing segments across multiple memory rows. This dimensional change enables simultaneous programming operations in different rows, effectively adding a parallelism dimension that resolves the conflict between constraint compliance and programming efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7724570B1Adaptive programming of memory circuit including writing data in cells of a memory circuit
Publication Date: 2010.05.25 SYNOPSYS INC
  • US7724570B1 patent drawing
  • US7724570B1 patent drawing
  • US7724570B1 patent drawing

AI summary

Adaptive programming methods and supportive device architecture for memory devices are provided. Methods include partitioning words into variable length segments. More particularly, methods include receiving a word of data, parsing the word into a plurality of write-subsets, where the size of the write-subsets depends on values of the data and constraints that are specific to the memory circuit, and writing the data in cells of the memory circuit, one write-subset at a time. A memory device includes a digital controller capable of parsing words into a plurality of write-subsets, where the length of write-subsets are depending on values of the data and constraints that are specific to the memory device.