Adaptive Memory Write Verification for NAND Flash Bandwidth
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Solution Overview
Problem
Limited lifetime computer storage devices like NAND flash and phase change memory face inefficiencies in write operations due to iterative write techniques, which consume additional resources and reduce write bandwidth, especially when storing multiple bits per cell.
Innovation Solution
The method involves writing data to memory locations sequentially, with each write operation followed by a read to determine if the desired value is achieved, allowing for adaptive adjustments based on previous write and read outcomes, thereby reducing the need for additional write attempts and minimizing resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If iterative write techniques (write-and-verify) are used to store multiple bits per cell with increased accuracy, then manufacturing precision is improved, but productivity deteriorates due to reduced write bandwidth
Solution Approach 1:
The patent applies preliminary action by performing read operations before the final write operation to verify memory cell status and determine the appropriate write strategy. This advance verification allows the system to prepare the optimal write sequence in advance, reducing the need for multiple retry cycles and thereby maintaining high write bandwidth while ensuring accurate multi-bit storage.
Solution Approach 2:
The patent implements dynamics by adaptively adjusting the write strategy based on real-time feedback from read operations. The write-and-verify process dynamically modifies subsequent write operations according to the actual memory cell state, allowing the system to optimize between write accuracy and bandwidth utilization depending on the specific cell conditions encountered during the writing process.
2Reliability
If iterative write techniques are used to ensure accurate data storage, then reliability is improved, but loss of time increases due to multiple write and read operations
Solution Approach 1:
By performing preliminary read operations to assess memory cell status before executing the write sequence, the system can identify cells that require attention in advance. This allows for more efficient write operations that target only the necessary cells, reducing the total time spent on iterative write-and-verify cycles while maintaining reliable data storage.
Solution Approach 2:
The patent applies skipping by allowing the write operation to proceed through the verify cycle more efficiently by skipping unnecessary re-verification steps for cells that are already in the desired state. This rushes through the iterative process for cells that don't require multiple attempts, thereby reducing overall write operation time while maintaining reliability.
Data Source
AI summary
Techniques for writing to memory using adaptive write techniques. An adaptive write technique includes receiving at a computer a message including a plurality of symbols. The message is written to a memory. The writing to memory includes performing for each symbol in the message: writing a data value to a memory location in the memory and reading contents of the memory location after the data value has been written. The data value is determined at the computer in response to the symbol and to the contents of any memory locations previously read as part of writing the message to the memory. It is determined at the computer if the contents of the memory locations reflect the message. The writing is restarted at the computer in response to determining that the contents of the memory locations do not reflect the message.