Adaptive MOS Biasing Circuit for Low-Power Analog Stability
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Solution Overview
Problem
Current analog circuits in mobile devices face challenges in reducing power consumption due to the requirement of maintaining signal energy above thermal noise, making it difficult to decrease supply voltage without increasing power consumption, and existing biasing methods are not efficient in minimizing power usage while maintaining signal-to-noise ratio and bandwidth.
Innovation Solution
An adaptive analog biasing unit is implemented in the integrated circuit, which includes a process monitor unit and a calculation unit to generate a bias current inversely proportional to the extracted device parameter, allowing MOS transistors to be biased in the saturation region with reduced power consumption while maintaining desired transconductance over temperature and process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage is decreased to reduce power consumption in analog circuits, then power consumption decreases, but signal-to-noise ratio deteriorates because signal energy falls below thermal noise threshold
Solution Approach 1:
The patent applies dynamic biasing by adjusting the bias current based on temperature conditions. The biasing circuit switches between different bias currents (first bias current at high temperature, second bias current at low temperature) to dynamically adapt to thermal conditions, thereby maintaining signal-to-noise ratio while optimizing power consumption across different operating temperatures.
Solution Approach 2:
The patent changes the bias current parameter based on temperature to resolve the contradiction. By monitoring temperature and adjusting the bias current accordingly, the system maintains adequate signal energy above thermal noise while minimizing power consumption. The bias current is reduced at high temperatures where thermal noise is higher, and increased at low temperatures where thermal noise is lower.
2Stability of the object's composition
If bias current is increased to maintain transconductance over temperature variations, then transconductance stability improves, but power consumption increases
Solution Approach 1:
The patent implements dynamic bias current adjustment based on temperature feedback. The biasing circuit transitions from static biasing to dynamic biasing where the bias current is adjusted in real-time according to temperature conditions, maintaining transconductance stability without excessive power consumption.
Solution Approach 2:
The patent employs temperature feedback mechanisms where the biasing circuit monitors temperature conditions and adjusts the bias current accordingly. This feedback loop ensures that transconductance remains stable across temperature variations while optimizing power consumption by using higher bias current only when necessary (at low temperatures).
3Device complexity
If constant bias current is used to simplify circuit design, then circuit complexity decreases, but power consumption increases because bias current cannot be optimized for different operating conditions
Solution Approach 1:
The patent transitions from static constant biasing to dynamic temperature-dependent biasing. The biasing circuit incorporates temperature sensing and adjustment mechanisms that enable it to adapt to different operating conditions, achieving power optimization without excessive complexity increase.
Solution Approach 2:
The patent creates a universal biasing circuit that handles multiple operating conditions (different temperatures) with a single integrated solution. The biasing circuit performs multiple functions: temperature sensing, bias current generation, and adaptive adjustment, replacing multiple separate biasing circuits that would be needed for different temperature ranges.
Data Source
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AI summary
An electronic device is provided which comprises at least one integrated circuit with at least one MOS transistor. The electronic device furthermore comprises an adaptive analog biasing unit (AAB) for providing an adaptive biasing current for the at least one MOS transistor biased in the saturation region. The adaptive analog biasing unit (AAB) is arranged on the same chip together with the integrated circuit and comprises a process monitor unit (PM) for extracting a device parameter (K) of the integrated circuits and a calculation unit (CU) for generating a bias current based on the output of the process monitor unit (PM). The bias current generated by the calculation unit (CU) is inversely proportional to the extracted device parameter (K).