Adaptive Noise Canceller Circuit for DPLL Spur Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Fractional-N frequency synthesizers in digital phase-locked loops face challenges with unwanted low-frequency spurs and noise generation, particularly in accurately determining error gain, which is often addressed by non-adaptive and complex analog circuitry.
Innovation Solution
An adaptive noise canceller circuit using a priority encoder approximation circuit is implemented to suppress noise in a digital phase-locked loop, enabling real-time tracking and efficient noise cancellation through an efficient approximation of the normalized least mean square algorithm, eliminating the need for dividers and reducing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog circuitry is used for noise cancellation, then measurement precision of error gain is improved, but device complexity increases
Solution Approach 1:
The patent replaces analog circuitry with a digital implementation of the normalized least mean square algorithm. The adaptive noise canceller uses digital signal processing to determine error gain, substituting physical analog components with computational logic that achieves the same measurement precision while reducing circuit complexity.
Solution Approach 2:
The patent transforms the error gain determination from a static analog measurement to a dynamic digital parameter that can be adaptively adjusted. By implementing the normalized least mean square algorithm in the digital domain, the system can change the error gain parameter in real-time based on operating conditions, maintaining precision while simplifying the overall circuit architecture.
2Device complexity
If non-adaptive noise cancellation is implemented, then device complexity is reduced, but adaptability to different operating conditions deteriorates
Solution Approach 1:
The patent implements a feedback mechanism through the normalized least mean square algorithm, where the error gain determination continuously monitors the output and adjusts its parameters accordingly. This adaptive feedback loop enables the digital circuit to track changing operating conditions in real-time, providing both low complexity and high adaptability.
Solution Approach 2:
The patent transitions from a static, non-adaptive noise cancellation system to a dynamic adaptive system. The error gain parameter is no longer fixed but evolves over time based on the algorithm's continuous optimization, allowing the system to adapt to varying operating conditions while maintaining simple digital circuitry.
3Measurement precision
If complex circuitry is used for accurate error gain determination, then measurement precision is improved, but ease of manufacture deteriorates
Solution Approach 1:
The patent replaces complex analog circuitry with a digital algorithm implementation. The normalized least mean square algorithm can be synthesized using standard digital logic cells and processes, making it easier to manufacture with modern CMOS technology while maintaining high measurement precision for error gain determination.
Data Source
AI summary
The present disclosure relates to a structure including an adaptive noise canceller circuit which is configured to suppress noise in a feedback sigma-delta modulator circuit and provide real-time tracking of a noise cancellation signal.


