Adaptive Flip-Flop Noise Filter for Pulse-Width-Based Delay Control
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Solution Overview
Problem
Existing noise filters for digital signals in microprocessors are unable to dynamically adjust noise removal time based on environmental factors, leading to potential malfunctions due to steep rise/fall transitions in analog signals during A/D conversion.
Innovation Solution
A noise filter comprising N-number of serially connected flip-flops with a selection unit and waveform check unit, allowing dynamic adjustment of filter stages based on pulse width, enabling optimal noise removal without software assistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed-stage noise filter is used, then the circuit structure is simple, but the filter cannot adapt to varying environmental conditions and signal characteristics
Solution Approach 1:
The patent implements a dynamic filter by making the number of filter stages variable rather than fixed. The filter dynamically adjusts the number of stages based on environmental conditions and signal characteristics, allowing adaptation to different operating scenarios while maintaining a relatively simple base structure.
Solution Approach 2:
The patent changes the parameter of filter stage count to adapt to different conditions. By varying the number of stages (N) based on temperature, signal frequency, and other environmental factors, the filter optimizes its performance without requiring completely different circuit designs for each condition.
2Reliability
If more filter stages are used, then noise removal capability is improved, but signal delay increases
Solution Approach 1:
The patent dynamically adjusts the number of filter stages based on the actual noise level and signal characteristics. When noise is high, more stages are activated for better filtering; when noise is low or signal speed is critical, fewer stages are used to minimize delay. This dynamic adjustment optimizes the trade-off between noise removal and signal speed.
Solution Approach 2:
The patent varies the filter stage count parameter to balance noise removal and signal delay. By changing this parameter adaptively rather than using a fixed high number of stages, the system achieves effective noise filtering only when necessary, thereby reducing unnecessary signal propagation delay.
3Speed
If the rise/fall transition time is reduced, then signal speed is improved, but noise increases during A/D conversion
Solution Approach 1:
The patent employs a dynamic filter that adjusts its stages based on the signal transition characteristics. When fast rise/fall times are used, the filter adaptively increases its filtering capability to compensate for the increased noise, allowing high-speed operation without sacrificing signal quality.
Solution Approach 2:
The patent applies noise filtering as a preliminary countermeasure to the noise generated by fast signal transitions. By having the filter ready and adaptable to the signal characteristics, it preemptively addresses the noise issue that arises from reduced transition times, rather than trying to fix it after the fact.
Data Source
AI summary
A noise filter, used for a digital signal, configuring an [N−1]-stage filter by connecting the N-number of flip flops in series comprises a selection unit for outputting a filter output signal by selecting one of signals filtered by one to (N−1) stages based on a selection signals; and a wave form check unit for making the selection unit change a selection thereby by changing a value of the selection signal based on a pulse width on the filter output signal which is output from the selection unit.