Adaptive Oscillator Clocking for Power Supply Droop Response
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Solution Overview
Problem
Clock generator circuits face instability due to noise on the power supply line, which can cause fluctuations in the system clock signal, leading to operational failures in integrated circuits, and existing compensation methods are either slow to detect noise or inefficient in terms of power consumption.
Innovation Solution
An adaptive oscillator circuit that automatically adjusts the output clock frequency in response to noise on the power supply line by using a Frequency Lock Loop and delay lines powered by both a regulated and a droopy power supply, allowing the clock frequency to modulate with voltage changes to maintain timing margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a two-step noise detection and compensation process is used, then clock signal stability is improved, but response speed deteriorates due to the sequential nature of detection and notification
Solution Approach 1:
The patent combines the noise detection function and clock frequency adjustment function into a single integrated oscillator circuit. The phase detector simultaneously detects noise on the power supply line and controls the voltage-controlled oscillator to adjust clock frequency, eliminating the sequential delay of separate detection and notification steps.
Solution Approach 2:
The oscillator circuit performs self-adjustment by using its own phase detector to monitor power supply noise and automatically modulating its output frequency in response. This self-service mechanism eliminates the need for external detection circuits and notification protocols, achieving both stability and fast response.
2Reliability
If margins are added to the power supply voltage to cover droop, then clock circuit timing reliability is improved, but power consumption increases significantly
Solution Approach 1:
The patent implements dynamic power supply voltage adjustment by modulating the oscillator's control voltage in response to detected noise. Instead of statically increasing the power supply voltage to create margins, the system dynamically adjusts the clock frequency to maintain timing margins, significantly reducing unnecessary power consumption.
Solution Approach 2:
The system changes the operating parameters of the oscillator by adjusting its output frequency based on power supply noise conditions. This parameter change approach allows the circuit to maintain reliability under varying conditions without the continuous power overhead of elevated supply voltage margins.
Data Source
AI summary
An output clock frequency of an adaptive oscillator circuit changes in response to noise on an integrated circuit power supply line. The circuit features two identical delay lines which are separately connected to a regulated supply and a droopy supply. In response to noise on the droopy supply, the delay lines cause a change in the output clock frequency. The adaptive oscillator circuit slows down the output clock frequency when the droopy supply droops or falls below the regulated supply. The adaptive oscillator circuit clamps the output clock frequency at a level determined by the regulated supply when the droopy supply overshoots or swings above the regulated supply.