Adaptive Out-of-Order Arbitration for Virtual Queues

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Solution Overview

Problem

Graphics processing systems experience bottlenecks due to the sequential processing of requests, leading to reduced processing efficiency as requests must wait for earlier requests to be completed before being processed.

Innovation Solution

Implementing a system where requests are mapped to a return queue structure, allowing for out-of-order arbitration by allocating virtual queues based on request needs, and deferring arbitration of partial requests until other queues are processed, ensuring efficient data retrieval and processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If requests are processed in the order they are generated or received, then the processing order is simple and easy to manage, but bottlenecks occur and processing efficiency is reduced

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidarbitration mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the single request processing queue into multiple virtual queues (VQ0-VQ3), each capable of being arbitrated independently. This segmentation allows parallel processing of multiple requests simultaneously, eliminating the sequential bottleneck while maintaining manageable complexity through structured queue organization and arbitration logic.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If multiple virtual queues are implemented for out-of-order arbitration, then processing time is reduced by allowing ready requests to be arbitrated first, but the system complexity increases

Engineering Contradiction:
Improverequest processing timeVSAvoidqueue management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-allocating multiple virtual queues and establishing arbitration logic before requests arrive. The system proactively sets up the multi-queue structure and arbitration mechanisms in advance, enabling immediate out-of-order processing when requests are received, rather than dynamically creating complexity during request handling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The virtual queues serve as intermediary structures between the request source and the processing pipeline. These queues buffer and organize requests, allowing the arbitration logic to selectively process ready requests while deferring others, thus mediating the conflict between maintaining simple processing flow and achieving high processing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If partial requests are arbitrated immediately, then processing speed is maintained, but deadlocks may occur when resource allocation conflicts arise

Engineering Contradiction:
Improvearbitration speedVSAvoidsystem stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements dynamic arbitration where the arbitration behavior adapts based on request completeness. Full requests are arbitrated immediately for high speed, while partial requests are dynamically deferred to avoid deadlocks. The system flexibly adjusts processing priorities based on the current state of resource allocation and request status, maintaining both speed and reliability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12105646B2Adaptive out of order arbitration for numerous virtual queues
Publication Date: 2024.10.01 ADVANCED MICRO DEVICES INC
  • US12105646B2 patent drawing
  • US12105646B2 patent drawing
  • US12105646B2 patent drawing

AI summary

A system includes a memory implementing one or more virtual queues and a processor coupled to the memory. In response to issuing one or more requests for data, a processor maps one or more of the requests for data to a return queue structure. The processor then allocates one or more virtual queues to the return queue structure based on the mapped requests. In response to allocating the virtual queues to the return queue, the processor writes the data indicated in the mapped requests to the allotted virtual queues and enables the return queue for arbitration. When the return queue is enabled for arbitration, the processor reads out the data written to the allocated virtual queues, processes the read out data, and provides the processed data to a processing pipeline.