Data Packet Processing With Throughput-Based Adaptive Flush Timing

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Solution Overview

Problem

Existing methods for processing data packets in electronic devices often result in decreased transmission speed due to inefficient packet merging, which can be exacerbated by initial network transmission delays or small data amounts, leading to suboptimal network throughput.

Innovation Solution

The implementation of a packet merge function that adapts to network throughput by determining a flush time based on measured network conditions, allowing for adaptive packet merging and flushing to reduce the load on the network stack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If packet merging is performed to reduce processing load, then device complexity is reduced, but transmission speed decreases due to time spent merging packets

Engineering Contradiction:
Improveprocessing loadVSAvoidtransmission speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent implements dynamic packet merging by adjusting the merge window size and timing based on network conditions and packet characteristics. The system continuously adapts merging parameters to balance processing load reduction with transmission speed maintenance, rather than using fixed merging rules.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes key parameters such as merge threshold, timeout values, and packet selection criteria based on network throughput and traffic patterns. By dynamically adjusting these parameters, the system optimizes the trade-off between merging efficiency and transmission speed.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If packet merging is performed to increase network throughput, then network throughput is improved, but transmission speed decreases for small data amounts

Engineering Contradiction:
Improvenetwork throughputVSAvoidtransmission speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent applies different merging strategies to different packet types and traffic flows. High-volume traffic streams receive aggressive merging to maximize throughput, while small data packets or time-sensitive traffic are processed with minimal merging to preserve transmission speed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs partial merging by selectively merging only a portion of packets based on criteria such as destination, protocol type, and size. This partial action approach ensures that merging benefits are realized where applicable while avoiding the speed penalties for packets that don't benefit from merging.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If packet merging is performed to reduce the number of responses, then the number of responses is reduced, but transmission speed decreases due to merging time

Engineering Contradiction:
Improvenumber of responsesVSAvoidmerging time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system performs preliminary sorting and grouping of packets before merging, organizing them by destination and type in advance. This preliminary action reduces the time required during actual merging operations and enables faster response generation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements skip-merging for time-critical packets, where certain packets are transmitted immediately without waiting for the merge window to close. This rushing through approach minimizes merging time for urgent traffic while still achieving response reduction for non-critical packets.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentEP3826246B1Device and method for processing data packets
Publication Date: 2025.07.09 SAMSUNG ELECTRONICS CO LTD
  • EP3826246B1 patent drawingFigure 1
  • EP3826246B1 patent drawingFigure 2
  • EP3826246B1 patent drawingFigure 3

AI summary

An electronic device, according to various embodiments of the present invention, comprises a network connection device, at least one processor, and a memory operatively connected to the at least one processor, wherein the memory stores instructions which, when executed, cause the at least one processor to: receive a data packet from the network connection device; add the data packet to a packet list corresponding to the data packet; and when the number of data packets included in the packet list is less than a threshold value, flush the data packets to a network stack on the basis of a flush time value for controlling a packet aggregation function, wherein the flush time value may be determined on the basis of the network throughput.