Adaptive Packet Header Reading for Router Memory Efficiency
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Solution Overview
Problem
Conventional routers inefficiently process packets with varying header lengths due to fixed data reading, leading to unnecessary data access and reduced performance, limiting their ability to handle multiple packet types effectively.
Innovation Solution
A packet transmission device with a shared memory and adaptive memory access controller that determines and reads out only the necessary header data based on packet type, improving memory access efficiency and processing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed length of data is read out to retrieve header data, then the router can process packets with maximum header length, but unnecessary data including payload is accessed for packets with shorter headers, lowering processing performance
Solution Approach 1:
The patent applies dynamics by making the header read length variable rather than fixed. The memory access controller dynamically adjusts the header read length based on the actual packet type and its corresponding header length, allowing the system to adapt between processing packets with different header lengths (e.g., 20 bytes for IPv4, 40 bytes for IPv6) without always reading maximum length data, thus improving processing performance while maintaining versatility
Solution Approach 2:
The patent changes the parameter of header read length from a fixed value to a variable parameter. The memory access controller modifies this parameter based on packet type identification, reading only the necessary header length for each packet type. This parameter change eliminates unnecessary data access for packets with shorter headers while preserving the ability to handle multiple packet types with different header lengths
2Productivity
If a fixed length is set for each different header data length, then processing performance is maintained, but constraints on router types arise and functionality is hindered
Solution Approach 1:
The patent implements universality by creating a single router architecture that can handle multiple packet types with different header lengths. The memory access controller universally applies the packet type identification mechanism to determine appropriate header read lengths for various packet types (IPv4, IPv6, L2, etc.), allowing one router to perform multiple functions without being constrained to specific packet types or requiring separate hardware configurations
3Speed
If separate header memory is provided to store only header data, then destination analysis efficiency is improved, but circuitry scale and power consumption increase
Solution Approach 1:
The patent merges the header storage function with the packet data storage in a single shared memory. Instead of providing separate header memory, the memory access controller is designed to selectively read only the necessary header portion from the shared memory based on packet type identification. This merging approach maintains destination analysis efficiency by enabling selective header access while reducing circuitry scale by eliminating redundant separate memory structures
Data Source
AI summary
A packet transmission device improved in packet transmission efficiency. Each packet input processor generates a pointer and identifies a packet type with respect to a received packet, and generates identification data including the pointer and the packet type identification result. A memory access controller detects a header readout amount of the packet based on the packet type identification result, generates first readout data including the header readout amount and a readout pointer indicative of a storage location of the packet in a shared memory, and adaptively reads out header data of the packet from the shared memory in accordance with the first readout data. A protocol processor analyzes the destination of the read header data, and a packet updater updates the old destination address of the packet to a new one to generate a packet with the updated destination address, and outputs the generated packet.