Adaptive Pattern Filtering for Clock and Data Recovery

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Solution Overview

Problem

Existing clock and data recovery systems face challenges in minimizing the interaction between clock and data recovery and decision feedback equalization, leading to corrupted timing recovery and reduced bandwidth due to the application of pattern filters, especially in low-loss transmission channels.

Innovation Solution

Adaptive pattern filtering is applied to discard edges only when DFE feedback levels can corrupt the timing recovery, using a phase detector that receives in-phase and quadrature samples, as well as samples representing the sum and difference of the received signal and equalization coefficients, to selectively suppress timing information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pattern filtering is applied to remove edges corrupted by DFE feedback, then timing recovery reliability is improved, but bandwidth is reduced due to fewer updates

Engineering Contradiction:
Improvetiming recovery reliabilityVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts the pattern filtering based on detected interaction levels between DFE feedback and timing recovery. When interaction is detected, pattern filtering is applied to protect timing recovery; when interaction is minimal, filtering is reduced or removed to maintain bandwidth. This dynamic adaptation resolves the contradiction by making the filtering behavior conditional rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of pattern filtering application based on channel conditions and DFE feedback strength. By monitoring the interaction level and adjusting whether pattern filtering is applied, the system optimizes the balance between timing recovery reliability and bandwidth utilization according to current transmission conditions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If pattern filtering removes edges to avoid DFE corruption, then timing information accuracy is improved, but device complexity increases due to filtering logic

Engineering Contradiction:
Improvetiming information accuracyVSAvoidfiltering logic complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system extracts and removes only the specific harmful component (corrupted edges identified by pattern filtering) from the timing recovery input, while preserving the useful timing information from non-corrupted edges. This selective extraction approach improves timing accuracy without requiring complete filtering of all edges, thereby limiting the increase in complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The pattern filtering logic acts as an intermediary between the DFE feedback path and the timing recovery path. It selectively blocks corrupted timing information while allowing clean timing information to pass through, mediating the interaction between these two paths and resolving the contradiction between accuracy and complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dual path architecture is used to separate clock and data recovery, then interaction between timing recovery and DFE is reduced, but circuitry complexity increases

Engineering Contradiction:
Improvetiming recovery independenceVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system segments the timing recovery input stream by identifying and separating corrupted edges from non-corrupted edges using pattern filtering. This segmentation allows selective processing where only corrupted portions are filtered out, achieving timing recovery independence without duplicating the entire clock and data recovery path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of creating a complete duplicate dual-path architecture, the system uses pattern filtering to selectively copy and process only the necessary timing information while filtering out corrupted portions. This approach achieves the goal of reducing interaction without requiring a full duplicate path, thereby limiting complexity increase.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10355889B1Adaptive pattern filtering for clock and data recovery to minimize interaction with decision feedback equalization
Publication Date: 2019.07.16 CADENCE DESIGN SYST INC
  • US10355889B1 patent drawing
  • US10355889B1 patent drawing
  • US10355889B1 patent drawing

AI summary

Systems and methods disclosed herein provide for adaptively applying pattern filters so that the edges are discarded only when the DFE feedback has adapted to levels that can corrupt the timing recovery. Embodiments of the systems and methods provide for a phase detector that selectively suppresses timing information based on the logic level states of the Qp and Qm data samples associated with the received signal.