Adaptive PLL Loop Bandwidth for Fast Locking With Low Overshoot
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase lock loops (PLLs) in electronic devices face challenges in quickly locking to a reference signal while minimizing signal overshoot, as existing technologies struggle to dynamically adjust loop bandwidth based on phase differences between output and reference signals.
Innovation Solution
The PLL's loop bandwidth is dynamically adjusted by modifying the DC open loop gain and natural frequency based on the phase difference between the output and reference signals, using a charge pump to increase or decrease current applied, thereby increasing bandwidth when the phase difference is outside a programmable range and decreasing it when within the range, reducing overshoot and enhancing locking speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the loop bandwidth is increased to quickly lock to the reference signal, then the locking speed is improved, but the signal overshoot increases
Solution Approach 1:
The patent implements dynamic loop bandwidth adjustment by switching between a first loop bandwidth (for fast locking) and a second loop bandwidth (for reducing overshoot). The system transitions from a fixed bandwidth design to a variable bandwidth design that adapts to different operational phases, allowing the PLL to achieve both fast locking and minimal overshoot at different times in the locking process.
Solution Approach 2:
The patent employs periodic switching between different loop bandwidths during the locking process. Initially, a wider bandwidth is used to accelerate locking, then after a predetermined time or condition is met, the bandwidth switches to a narrower setting to reduce overshoot. This time-based periodic action allows the system to optimize performance at different stages of operation.
2Object-generated harmful factors
If the loop bandwidth is decreased to reduce signal overshoot, then the signal stability is improved, but the locking speed decreases
Solution Approach 1:
The system dynamically adjusts the loop bandwidth based on the locking stage rather than using a fixed narrow bandwidth. This allows the PLL to maintain fast locking capability when needed while minimizing overshoot when the signal is接近 the target frequency, resolving the trade-off between speed and stability.
Solution Approach 2:
The patent uses time-based or condition-based switching to periodically change the loop bandwidth from narrow to wide and back again. This periodic action ensures that the narrow bandwidth (which reduces overshoot) is applied at the appropriate moment in the locking sequence, after initial acquisition has occurred.
3Device complexity
If a fixed loop bandwidth is used, then the device complexity is reduced, but the synchronization efficiency deteriorates
Solution Approach 1:
The patent implements a dynamic bandwidth control mechanism that switches between two predefined loop bandwidth values based on locking conditions. This adds minimal complexity (essentially a switch and control logic) while dramatically improving synchronization efficiency by optimizing bandwidth for different locking stages.
Solution Approach 2:
The system changes the loop bandwidth parameter from a fixed value to a variable value that adapts based on locking progress. This parameter change enables the PLL to achieve both fast initial locking and precise final synchronization, significantly improving overall synchronization efficiency with minimal added complexity.
Data Source
AI summary
The loop bandwidth of a PLL is adjusted based on a difference between the output signal of the PLL and the PLL reference signal. In an embodiment, the DC open loop gain and natural frequency of the PLL are adjusted based on the phase difference between the output signal and the reference signal, so that the loop bandwidth of the PLL is increased when the phase difference is outside a programmable range and is decreased when the phase difference is within the programmable range.