Adaptive PLL Bandwidth Control for Low-SNR OFDM Phase Locking
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Solution Overview
Problem
Frequency and phase errors between oscillators in wireless devices communicating via orthogonal frequency division multiplexing (OFDM) disrupt demodulation, particularly in low signal-to-noise ratio environments, such as those encountered in Smart Utility Networks (SUNs), leading to errors in symbol decoding.
Innovation Solution
A phase-locking loop (PLL) is implemented with a loop bandwidth controller that adjusts its bandwidth from a wide initial value for fast carrier acquisition to a narrower value for improved phase noise rejection, utilizing pilot and data signals to track phase offset and despread frequency domain spreading, enabling accurate phase locking and reducing phase noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a wide bandwidth is used for the PLL, then fast carrier acquisition is achieved, but phase noise increases
Solution Approach 1:
The patent implements a dynamic bandwidth adjustment mechanism where the PLL bandwidth is not fixed but changes over time. The bandwidth controller adjusts the loop bandwidth from a wider initial value to a narrower value after carrier acquisition, allowing the system to achieve fast initial locking while maintaining low phase noise during data reception. This dynamic adaptation resolves the contradiction between speed of acquisition and phase noise performance.
Solution Approach 2:
The patent changes the bandwidth parameter of the PLL over time based on the reception stage. During initial carrier acquisition, a wider bandwidth is used to quickly track the carrier frequency. After acquisition is complete and before/during data reception, the bandwidth is narrowed to reduce phase noise. This parameter change strategy allows the system to optimize performance for different operational phases.
2Reliability
If a narrow bandwidth is used for the PLL, then phase noise is reduced, but carrier acquisition speed decreases
Solution Approach 1:
The patent implements a dynamic bandwidth adjustment mechanism where the PLL bandwidth is not fixed but changes over time. The bandwidth controller adjusts the loop bandwidth from a wider initial value to a narrower value after carrier acquisition, allowing the system to achieve fast initial locking while maintaining low phase noise during data reception. This dynamic adaptation resolves the contradiction between speed of acquisition and phase noise performance.
Solution Approach 2:
The patent changes the bandwidth parameter of the PLL over time based on the reception stage. During initial carrier acquisition, a wider bandwidth is used to quickly track the carrier frequency. After acquisition is complete and before/during data reception, the bandwidth is narrowed to reduce phase noise. This parameter change strategy allows the system to optimize performance for different operational phases.
3Reliability
If frequency domain spreading is applied, then signal robustness is improved, but phase offset extraction complexity increases
Solution Approach 1:
The patent applies despreading operation before phase offset extraction. By removing the frequency domain spreading first, the system simplifies the subsequent phase estimation process. The despreader reverses the spreading operation applied at the transmitter, concentrating the signal energy and removing the spreading code effects, which makes the phase offset extraction that follows more straightforward and less complex.
Solution Approach 2:
The patent separates the signal processing into distinct stages: first despreading the signal to remove frequency domain spreading effects, then performing phase offset extraction on the despread signal. This segmentation of processing steps allows each operation to be optimized independently and simplifies the overall complexity by breaking down the challenging task of phase extraction from spread-spectrum signals into manageable sequential operations.
Data Source
AI summary
A phase-locking loop (PLL) for use with orthogonal frequency division multiplexed signals. In one embodiment, a wireless receiver includes a PLL is configured to reduce phase and frequency divergence between the wireless receiver and a transmitter of a packet received by the wireless receiver. The PLL includes a loop bandwidth controller. The loop bandwidth controller is configured to set a bandwidth of the PLL to a first value for reception of an initial symbol of the packet. The loop bandwidth controller is configured to reduce the bandwidth of the PLL over a number of symbols preceding an initial header of the packet.