Adaptive PLL Filter Bandwidth for Read Channel Phase Jumps
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Solution Overview
Problem
In heat-assisted magnetic recording (HAMR) technology, phase errors due to laser instability, such as mode hopping, cause sudden jumps in phase, leading to read phase errors that conventional decoding methods cannot recover, resulting in unrecoverable data bits and slowed drive performance.
Innovation Solution
A phase-locked loop (PLL) filter system that adjusts its bandwidth dynamically by selecting phase and frequency coefficients from a look-up table based on the magnitude of phase error signals, allowing for continuous and adaptive phase error compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional fixed bandwidth PLL filter is used, then the circuit complexity is low, but it cannot effectively compensate for sudden phase jumps caused by laser mode hopping, resulting in unrecoverable data bits
Solution Approach 1:
The patent implements a dynamic bandwidth adjustment mechanism where the PLL filter transitions from a fixed bandwidth design to a variable bandwidth design. The filter bandwidth is dynamically adjusted based on detected phase error magnitude: when large phase errors are detected (indicating mode hopping), the bandwidth is increased to allow faster tracking; when small phase errors occur during normal operation, the bandwidth is reduced to minimize jitter. This dynamic adaptation resolves the contradiction by enabling the filter to handle both sudden phase jumps and normal operation effectively.
Solution Approach 2:
The patent changes the bandwidth parameter of the PLL filter based on operating conditions. A look-up table stores multiple sets of filter coefficients corresponding to different bandwidth settings. The system selects appropriate coefficients from the look-up table based on the magnitude of phase errors, thereby changing the filter bandwidth parameter adaptively. This parameter change approach enables the system to maintain high data recovery capability while managing circuit complexity through structured coefficient storage.
2Speed
If the PLL filter bandwidth is increased to track phase jumps, then phase tracking capability improves, but jitter increases during normal operation
Solution Approach 1:
The patent employs dynamic bandwidth adjustment where the filter bandwidth is not fixed but changes based on the detected phase error magnitude. During normal operation with small phase errors, the bandwidth is kept narrow to ensure signal stability and minimize jitter. When large phase errors indicating mode hopping are detected, the bandwidth is rapidly expanded to enable fast phase tracking. This dynamic behavior resolves the contradiction by having the filter adapt its speed-stability tradeoff to current operating conditions.
Solution Approach 2:
The system changes the bandwidth parameter of the PLL filter based on phase error magnitude. A look-up table contains pre-calculated filter coefficients for different bandwidth settings. The system monitors phase errors and selects appropriate coefficients from the look-up table, thereby changing the bandwidth parameter. This parameter change strategy enables fast tracking when needed while maintaining signal stability during normal operation, resolving the speed-stability contradiction.
3Adaptability or versatility
If a fixed bandwidth PLL filter is used, then the circuit is simple, but it cannot adapt to varying phase error conditions, resulting in degraded performance during mode hopping
Solution Approach 1:
The patent transforms a static PLL filter into a dynamic adaptive filter. The filter bandwidth automatically adjusts based on the magnitude of phase errors detected from the read channel. When mode hopping occurs and large phase errors are detected, the filter dynamically expands its bandwidth to accommodate the rapid phase changes. During normal operation, it maintains a narrow bandwidth for optimal performance. This dynamic adaptability resolves the contradiction between adaptability and complexity.
Solution Approach 2:
The system implements parameter changes in the PLL filter by using a look-up table that stores multiple sets of filter coefficients corresponding to different bandwidth settings. The system monitors phase error magnitude and selects appropriate coefficients from the look-up table, thereby changing the filter parameters adaptively. This structured approach to parameter changes enables the filter to adapt to varying phase error conditions while managing complexity through pre-calculated coefficient storage.
4Reliability
If the PLL filter bandwidth is kept narrow for low jitter, then signal stability is maintained, but the filter cannot respond quickly to sudden phase jumps
Solution Approach 1:
The patent implements a dynamic bandwidth adjustment mechanism where the PLL filter bandwidth is not fixed but changes in response to detected phase error magnitude. During normal operation with small phase errors, the bandwidth is kept narrow to maintain signal stability and minimize jitter. When large phase errors indicating mode hopping are detected, the bandwidth is rapidly expanded to enable fast response to phase changes. This dynamic behavior resolves the contradiction by having the filter adapt its response characteristics to current operating conditions.
Solution Approach 2:
The system changes the bandwidth parameter of the PLL filter based on phase error magnitude. A look-up table contains pre-calculated filter coefficients for different bandwidth settings. The system monitors phase errors and selects appropriate coefficients from the look-up table, thereby changing the bandwidth parameter. This parameter change strategy enables the filter to maintain signal stability during normal operation while responding quickly to sudden phase jumps when needed, resolving the stability-speed contradiction.
Data Source
AI summary
A phase-locked loop (PLL) filter of a read channel includes a filter portion having an input coupled to delay circuitry having an output. The input of the filter portion is configured to receive a phase error signal. A look-up table is coupled to the filter portion. The look-up table comprises phase coefficients and frequency coefficients associated with a plurality of phase error magnitudes. The look-up table is configured to provide one or both of a selected phase coefficient and a selected frequency coefficient based on a magnitude of the phase error signal. The PLL filter is configured to adjust a bandwidth of the filter portion using one or both of the selected phase coefficient and the selected frequency coefficient. A phase signal indicative of estimated phase disturbance is produced at the output of the delay circuitry.


